ACTA IMEKO  December 2014, Volume 3, Number 4, 10 – 16  www.imeko.org    ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 10  Two‐functional µBIST for Testing and Self‐Diagnosis of Analog  Circuits in Electronic Embedded Systems  Dariusz Załęski, Romuald Zielonko  Gdansk University of Technology, Faculty of Electronics, Telecommunications and Informatics, Department of Metrology and  Optoelectronics, ul. Gabriela Narutowicza 11/12, 80‐233 Gdansk ,Poland      Section: RESEARCH PAPER   Keywords: Electronic embedded systems; built‐in self‐testers (BIST); functional testing; analog fault diagnostics  Citation: Dariusz Załęski, Romuald Zielonko, Two‐functional µBIST for Testing and Self‐Diagnosis of Analog Circuits in Electronic Embedded Systems, Acta  IMEKO, vol. 3, no. 4, article 4, December 2014, identifier: IMEKO‐ACTA‐03 (2014)‐04‐04  Editor: Paolo Carbone, University of Perugia   Received October 10 th , 2013; In final form October 10 th , 2013; Published December 2014  Copyright: © 2014 IMEKO. This is an open‐access article distributed under the terms of the Creative Commons Attribution 3.0 License, which permits  unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited  Funding: (none reported)  Corresponding author: Romuald Zielonko, e‐mail: zielonko@eti.pg.gda.pl    1. INTRODUCTION  Electronic embedded systems (EESs) with an embedded intelligent unit in a structure (usually in the form of a microcontroller), are widely used in many branches of industry, technology and science. The dominant group of EESs are mixed-signal systems. A common fact of these systems is the presence of analog circuits, since there always must be an interface to the real world. Mixed-signal EESs bring new challenges to the test problem of the analog circuits and blocks, because there is lack of general test methods and strategies. The main direction of development of testing analog circuits in EESs is the built-in self-test (BIST) technique. In last years many specific solutions of BISTs dedicated for concrete circuits have been reported: oscillation-based BIST (OBIST) [1], digital reuse [2], histogram based [3], [4] dedicated for fully-differential stages [5], [6],  BIST [7], [8] and ADC BIST for AD converters. The common feature of these solutions is hardware excess, i.e. the necessity to build an overhead hardware into the EES’s structure, which introduces additional costs. One promising solution to reduce the hardware overhead and testing costs is reuse of signal blocks already present in the EES (such as processors and memories) for a BIST creation. The new generations of microcontrollers (e.g. AT91SAM, ADuC814) have hardware resources (ADCs, DACs, timers, counters, analog comparators) that allow to generate stimulating signals and to measure responses of a circuit under test (CUT), as well as the computing power to realize of testing procedures. Therefore, the hardware and software resources of modern microcontrollers are sufficient for creation of microBISTs (µBISTs). These resources are sufficient, but simultaneously they are rather modest, thus special signals and procedures adequate to microcontroller resources must be used. Some solution of the µBIST for functional testing based on shape designed complementary signals (CSs) [9], [10], ABSTRACT  The paper concerns the testing of analog circuits and blocks in mixed‐signal Electronic Embedded Systems (EESs), using the Built‐in  Self‐Test  (BIST)  technique.  An  integrated,  two‐functional,  embedded  microtester  (µBIST)  based  on  reuse  of  signal  blocks  already  present in an EES, such as microprocessors, memories, ADCs, DACs, is presented. The novelty of the µBIST solution is its extended  functionality. It can perform 2 testing functions: functional testing and fault diagnosis on the level of localization of a faulty element.  For functional testing the Complementary Signals (CSs), and for fault diagnosis the Simulation Before Test (SBT) vocabulary techniques  have been used. In the fault vocabulary the graphical signatures in the form of identification curves in multidimensional spaces have  been applied.   ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 11  [11] has been proposed by the authors in [12]. The disadvantage of this solution is poor functionality, limited only to functional testing. The novelty of the solution presented in this paper is the extended functionality of the µBIST, including both functional and diagnostic testing. In the proposed solution (named the integrated, two-functional µBIST) for functional testing, complementary signals and for fault diagnosis SBT (simulation before test) techniques have been used. The paper is organized as follows: Section II presents the CS method for functional testing. Section III describes a vocabulary SBT technique for diagnostic testing. Section IV presents an experimental realization of the integrated two- functional µBIST and its verification in an exemplary EES. 2. DESCRIPTION AND INVESTIGATION OF THE CS METHOD  FOR FUNCTIONAL TESTING  The essence of this method is stimulation of the CUT by a special shape-designed CS signal, whose parameters are matched to poles of the CUT’s transfer function. Two kinds of CS signals has been investigated in [14]: �i- parameters CS (with variable impulse amplitude �i) and Ti- parameters CS (with variable impulse width Ti). A typical example of Ti-parameters CS signal is shown in Figure 1a. The testing principle is explained in Figure 1b. The first impulse of the CS signal drives the CUT into an initial state yT0(t), whereas the remaining impulses yT1(t), yT2(t) compensate it, in the manner shown in the figure, that the CUT response y(te) reaches a zero state at the signal end time te. Such situation takes place when the CUT is in its nominal state. In a faulty state, when transfer function poles are deviating from nominal values, the CUT response after the end of stimulation is not compensated (y(te)≠0). The sample value of the CUT response y(te) depends on deviation of transfer function parameters from the nominal state. So, it can be used for functional testing of the CUT transfer function. The CS method has been widely investigated, at first via simulations and then via physical experiments, on the example of testing of a 4th order Butterworth low-pass filter (LPF). The structure of the filter, as well as nominal functional parameters and component values are shown in Figure 2. The filter was composed with two BiQuad sections realized on the integrated circuit UAF42. The transfer function of the 4th order Butterworth LPF is described by the following formula:                        2 2 1 2 2 2 2 21 2 1 2 1 2 ( ) n nIV n n n n G s s s s s Q Q (1) where: n1, n2 are filter cut-off angular frequencies, Q1, Q2 are quality factors of the 1st and 2nd section. The filter was stimulated by a matched Ti-parameter CS signal with 1 V impulses and with following Ti-parameters: T0 = 15.916 ms, T1 = 37.393 ms, T2 = 57.185 ms, T3 = 70.397 ms, T4 = te = 75.027 ms. The investigation results of the deviation influence of both: quality factors Q1, Q2 and angular frequencies n1, n2 on the CUT’s output signal, are presented in Figure 3. It is seen from plots shown in the figure, relations y(te)=f(Qi/Qi) and y(te)=f(ni/ni) are convenient to implement. The y(te)=f(Qi/Qi) relations are linear in a wide range of Qi/Qi deviation (±50%). The testing t T0 T1 T2 T3 -  u(t) te (a)  (b) Figure 1. An example of the 3 rd  order Ti‐parameter CS (a) and CUT responses  yTi(t) to each impulse of Ti‐parameter CS and its resultant response y(t) (b).  R14 50 k R12 50 k RF11 R11 50 k C12 1000 pF C11 1000 pF RF12 RG1 RQ1 12 13 8 7 14 1 3 11 UAF42 VIN C11A C12A R24 50 k R22 50 k RF21 R21 50 k C22 1000 pF C21 1000 pF RF22 RG2 RQ2 12 13 8 7 14 1 3 11 UAF42 LP Out C21A C22A   Components  values  of  the  1 st   section:  RG1=52.22 k  RQ1=83.56 k  RF11,RF12=15.28 k C11A=1052 nF  C12A=1054 nF        Components  values  of  the  2 nd   section:  RG2=51.84 k  RQ2=17.43 k  RF21,RF22=14.95 k C11A=1040 nF  C12A=1041 nF    Functional parameters:  fc=10 Hz  c=62.8319 rad/s  Q1=0.54119  Q2=1.30655  s1, s2=‐58.0491  4.0447i   s3, s4=‐24.0447  8.0491i Figure 2. Schematic diagram of investigated 4 th  order Butterworth low‐pass  filter and its component values.  -50 -40 -30 -20 -10 0 10 20 30 40 50 -40 -30 -20 -10 10 20 30 40 y (t e) [mV] Qi/ Qi [%] (a) -50 -40 -30 -20 -10 0 10 20 30 40 50 -40 -20 20 40 60 80 y(t e) [mV] n/n [%] (b) Figure  3.  Responses  y(te)=f(Qi/Qi)  and  y(te)=f(ni/ni)  of  the  tested  4 th   order LPF as a function of Q1 and Q2 factors deviation (a) and n1 and n2  angular frequencies deviation (b).  y(t) ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 12  sensitivity is about 0.8 mV/1%. The y(te)=f(ni/ni) relations are slightly nonlinear and the testing range for positive deviations of (ni/ni) is limited to 25%. Testing sensitivities are not equal for different BiQuad sections of the filter. For the 1st section the sensitivity is about 0.5 mV/1% and for the 2nd section it is about 1 mV/1%. In all investigated cases testing sensitivities are high enough for CUT functional testing. The CUT’s output response signals y(te) are easy to measure using the AD converter available in the microcontroller ADuC814, chosen for the realization of the two-functional µBIST. Hardware resources of this microcontroller (12-bit ADC and DACs and 3x16-bit programmable counters) are good enough for the generation of CS signals with adequate precision and for accurate measurement of CUT’s output responses. In [14] the metrological properties of the �i-parameters and Ti-parameters CSs have been widely investigated and compared. The following conclusions should be emphasized: - both signals have similar sensitivities to deviations of CUT functional parameters, - more predestined for application in the µBIST are Ti-parameters CSs. They are shorter, easier to generate using microcontroller resources and can be optimized to the CUT structure by matching the width of the 1st impulse. The most useful is a unipolar Ti-parameter CS. Generally, we can conclude that unipolar Ti-parameters CSs signals are suitable for application in a µBIST for functional testing of analog circuits and blocks in EESs, which appears as the first function of an integrated µBIST. The CS method might be useful in the low frequency range, up to about 10 kHz. 3. DESCRIPTION AND INVESTIGATION OF THE SBT  DIAGNOSTIC METHOD  For diagnostic testing of analog circuits in the EESs, which appears as the second function of an integrated µBIST, the vocabulary SBT method has been chosen, with graphical fault signatures in the form of identification curves in multidimensional measurement spaces. Such a form of the fault vocabulary has two advantages: - identification curves can be scaled, thus they make fault localization and also identification possible, - it is possible to introduce an additional distinctive feature of the measurement signal to increase the dimension of the measurement space, and in consequence rarefying curves in the space. In result it enables to increase distinctivity of fault localization and to decrease the fault masking effect of parameter tolerances. We investigated this method using a 2D and 3D measurement space based on the samples u1(t1), u2(t2),..., uk(tk) of a CUT output response at properly chosen time moments, taking into account 2 cases: toleranceless CUTs and CUTs with real tolerances of elements. At first, for simplification we explain this method on the example of fault diagnosis of the 2nd order Butterworth LPF (Figure 4), without taking into account tolerances. For the filter, on the basis of 2 or 3 samples of its output response to a single square-impulse stimulation, we can R1 = R2 = 10 k   C1 = 70.44 nF   C2 = 146.35 nF  Figure 4. The 2nd order low‐pass filter.  (a) (b)  Figure 5. The families of identification curves on the plane (a) and in the 3D  space (b).  Figure 6. The identification curves for range 0.5pi nompi1.5pi nom.  (a) R1, R2, R3 = 5 k,  C1 = 44.5 nF   C2 = 110 nF  C3 = 6.42 nF  fc= 1 kHz   (b) Figure 7. The circuit diagram the 3 rd  order Butterworth LPF (a) and families  of dispersed identification curves (belts) in the 3D space (b).  ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 13  obtain the fault vocabulary in the form of a family of identification curves on a plane (for 2 samples u1(t1), u2(t2)) or in 3D space (for 3 samples u1(t1), u2(t2), u3(t3)) as shown in Figure 5, for wide a range of parameters change: 0.1pinompi10pinom. In practice, the soft faults are diagnosed in narrower ranges: 50% (0.5pinompi1.5pinom) or even 25%. The family of scaled identification curves in the range 50% is shown in Figure 6. In this range, as it is seen, the curves are smooth and easy to point interpolation. For such fault signature classification a simple conventional point distance classifier can be used. The required memory size for a fault vocabulary is moderate. For example, in case of a fault vocabulary in 3D space with 10 identification curves and 50 interpolation points for each, the memory size is about 3750 bytes. The toleranceless version of the SBT method can be useful for fault diagnosis of circuits with small parameter tolerances <0.5%. It seems to be of little use in practice. In practice, analog circuits have higher tolerances (in real circuits 2%-5%), which cause dispersion of identification curves in the measurement space. The dispersed curves form in the 2D space a kind of identification belts, and in the 3D space they form the identification snakes as shown in Figure 7. Such families can be obtained from simulations using the Monte Carlo method. Identification belts and snakes in the general case have variable cross sections, but for moderate CUT’s tolerances (2%) they can be assumed constant. The identification belts and snakes can be used for soft fault diagnosis, but their more sophisticated description as graphic signatures in the fault vocabulary is needed. An appropriate classifier fitted to these signatures must be used. For modeling of the identification belts and snakes and description in a vocabulary, we have used models shown in Figure 8, for 2D and 3D spaces. The belts are modeled by the set of circles with radius of  around the interpolation points Pi of the nominal identification curve. The sets of spheres around the interpolation points, with radius of , model the identification snakes. They are described by two factors: co-ordinates of interpolating points of the nominal identification curve, and the scaling factor , which characterizes the dispersion of the curve in these points. Different versions of the method were investigated, but for implementation in the µBIST based on the ADuC814 microcontroller, we have used the 3D version of the method with the following assumptions: all identification snakes have a constant scaling factor  = 2, where  is the standard deviation and the distance between interpolation points Pi is 1.5 = 3. The confidence coefficient  depends on the distance between adjacent interpolation points Pi. For a distance equal to 3, based on the drawing in Figure 9 that shows a piece of the identification belt model in 2D space, the value of the confidence coefficient  has been estimated as  =0.954-0.0350.92 [14]. This value is sufficient for using this model in practice. The testing procedure is simple and based on sequential checking of the distance between the measurement point Pm and the interpolating points Pi of identification curves with the use of a conventional point distance classifier. Description of the identification snakes in the 3D fault vocabulary (using co-ordinates of interpolation points Pi and scaling factor ) for the CUT with 10 elements requires 3000 bytes, for a fault range of 50% In a testing procedure, 9 operations must be performed for the checking of each interpolating point Pi of the identification curve in the fault vocabulary. Thus, about 5000 operations are required for testing a 10 element CUT. It can easily be realized in an acceptable time of <0.1 seconds. Based on simulation investigations, we can conclude that the real tolerance version of the SBT method can be easily realized in the ADuC814 microcontroller, but it needs experimental verification in a physically realized µBIST. (a) (b) Figure 8. Models of identification belts and snakes in 2D (a) and 3D (b)  spaces.  Figure 9. A piece of identification belt model for estimation of confidence  coefficient α.  Figure 10. The block diagram of the realized µBIST.  ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 14  4. EXPERIMENTAL REALIZATION AND VERIFICATION OF AN  INTEGRATED TWO‐FUNCTION µBIST  On the basis of hardware and software resources of the Analog Devices microcontroller ADuC814, an integrated µBIST for functional and fault diagnostic testing of analog circuits in the EESs has been physically realized and investigated in an experimental embedded system. The structure of the µBIST is shown in Figure 10 and its circuit diagram is shown in Figure 11. Almost all additional elements surrounding the ADuC814 chip are present in each EES and they are necessary for proper functioning of the microcontroller. The microcontroller was programmed with software realizing two testing procedures of functional testing (using unipolar Ti-parameter CS signals) and the diagnostic testing using the SBT method, in a 3D version. The µBIST was investigated experimentally, on the basis of physical testing of some real analog circuits, mainly filters. Different variants of the CS method for functional testing and the SBT method for fault diagnosis have been experimentally investigated. Various deviations of Qi, n Figure 11. The circuit diagram and the picture of the realized µBIST.  -50 -40 -30 -20 -10 0 10 20 30 40 50 -40 -30 -20 -10 10 20 30 y(te) [mV] Q1/Q1 [%] measured CUT response simulated CUT response (a) -50 -40 -30 -20 -10 0 10 20 30 40 50 -40 -30 -20 -10 10 20 30 40 50 y(te) [mV] measured CUT r esponse simulated CUT r esponse Q2/Q2 [%] (b) Figure  12.  The  simulated  and  measured  CUT  responses  y(te)=f(Qi/Qi)  as  function of Q1 (a) and Q2 (b) deviations.  -50 -40 -30 -20 -10 0 10 20 30 40 50 -30 -20 -10 10 20 30 40 50 y(te) [mV] measured CUT response simulated CUT response n1/n 1 [%] (a) -50 -40 -30 -20 -10 0 10 20 30 50 -40 -20 20 40 60 80 40 measured CUT response simulated CUT response y(te) [mV] n2/n2 [%] (b) Figure 13. The simulated and measured CUT responses y(te)=f(ni/ni) as a  function of n1 (a) and n2 (b) deviations.  Figure  14.  The  testing  results  on  the  background  of  the  family  of  identification curves for the 2 nd  order LPF.  ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 15  parameters and values of soft faults for each pi element were physically entered to real CUTs. The experimental results were compared with simulation ones. For the CS method of functional testing a comparison between experimental and simulation results is shown in Figure 12. In simulation and experimental investigations the same CS signal level of 1 V has been used. Figure 12 shows experimental (blue curve) and simulated (red curve) plots: y(te)=f(Q1/Q1) and y(te)=f(Q2/Q2) concerning dependences of the CUT response signal on Q1 and Q2 deviations. Analogous plots of y(te)=f(n1/n1) and y(te)=f(n2/n2), concerning deviations of n1 and n2, are shown in Figure 13. As it is seen in both figures, experimental results are very close to the simulated ones. Experimental and simulated plots have the same shapes and they are very close, especially in the range of ±10% deviations. Higher differences out of this range do not matter in practice, because relations CUT response – parameter deviations can be modeled on the basis of experimental data. In simulations and experimental investigations of this method, CS signals with a level of 1 V have been used. For such signals the threshold level of functional testing is on the level of a few percent for Qi/Qi and ni/ni deviations. In practice CUT stimulation with higher level of CS, up to 5 V, can be used. It enables to obtain a lower threshold level for both parameter deviations Qi/Qi and ni/ni, below 1%. The convergence of the simulation and experimental results confirms the previous conclusions from simulation investigations. The method can be used in a frequency range up to 10 kHz. For the SBT method of fault diagnostics the 2nd order LPF shown in Figure 4 was experimentally investigated. Figure 14 shows the results of the investigations (in the form of crosses) in comparison with simulated identification curves. As it is seen, in this case the experimental results and simulated curves are very close in a wide investigated range 0.1pinompi10pinom.. This example and other investigations presented in [14] confirm the usefulness of this SBT diagnostic method for application in a µBIST. It can be utilized for fault localization in analog circuits with a moderate number of components of about 10, like: filters, equivalent circuits of signal transmission lines or non- electrical objects (e.g. sensors) modeled in the form of multi-element two-terminals or two-ports. The method makes localization of single soft faults and ambiguity groups possible as well as detection of multiple faults. On the basis of both above methods of functional and diagnostic testing, the final version of the two-functional µBIST has been programmed in the microcontroller ADuC814. In both methods unipolar input signals with an extended impulse level of 5 V have been used. Some µBIST properties are given below: - Threshold level for functional testing deviations Qi/Qi is 1% and for deviations ni/ni is about 0.8%. - Mean functional testing time of the 4th order LPF is about 90 ms. Mean time of diagnostic testing of the same filter is about 600 ms. - The required microcontroller memory size for functional testing is 476 bytes and for diagnostic testing it is 2469 bytes (total 2945 bytes). There are many possibilities of improving the µBIST, mainly by using more advanced 16- or 32-bit microcontrollers and a neural network classifier of fault signatures. Recently, a neural classifier with two-central basis functions has been elaborated and reported in [16]. It is well suited to application in BISTs. We are going to implement this classifier in the new version of the integrated BIST. 5. CONCLUSIONS  In this paper the new concept, methodology and solution of an integrated, two-functional BIST, dedicated to testing of analog parts of electronic embedded systems, have been presented. The BIST integrates two functions: functional testing and fault diagnosis on the level of localization of soft faulty component. The BIST has been constructed on the basis of reusing a microcontroller and other blocks already present in each EES. We showed that contemporary microcontrollers, like the ADuC814, have sufficient hardware and software resources to design BISTs for functional and diagnostic testing of linear analog circuits in the low frequency range (0.1 Hz - 10 kHz) such as: filters, signal transmission paths or some non-electrical objects (e.g. sensors) modeled by electrical schemes. There are perspectives of further improvement of the presented BIST, using 16- or 32-bit microcontrollers and a neural classifier. REFERENCES  [1] Toczek W.: “An oscillation-based built-in test scheme with AGC loop”. Measurement, vol. 41, no. 2 pp. 160-168, 2008. [2] Andrade A. Q.:”Test Planning for Mixed-Signal SoCs and Analog BIST: a Case Study”. IEEE Transact. on Instrumentation and Measurement, vol.54, no. 4, 2005. [3] Toczek W., Kowalewski M., Zielonko R.: “Histogram-Based Feature Extraction Technique Applied for Fault Diagnosis of Electronic Circuits”. Proceedings of the 10th Int. Conference on Technical Diagnosis, IMEKO TC-10, pp. 27-32, Budapest, 2005. [4] Ren J., H. Ye: “A Novel Linear Histogram BIST for ADC”. Ninth International Conference on Solid-State and Integrated-Circuit Technology, pp. 2099-2102, Beijing, 2008. [5] Stratigopoulos H. G. D.: “An Adaptive Checker for Fully Differential Analog Code”. IEEE Journal of Solid-State Circuits, vol. 41, no. 6, pp. 1421-1429, 2006. [6] Toczek W.: “Self-testing of fully differential multistage circuits using common-mode excitation”. Microelectronics Reliability, pp. 1890-1899, 2008. [7] Huang J. L., Cheng K. T.: “A Sigma-Delta Modulation Based BIST Scheme for Mixed-Signal Circuits”. Proceedings of the 2000 Asia And South Pacific Design Automation Conference, pp. 605-610, Japan, 2000. ACTA IMEKO | www.imeko.org  December 2014 | Volume 3 | Number 4 | 16  [8] Toczek W.: “Analog fault signature based on sigma-delta modulation and oscillation test methodology”. Metrology And Measurement Systems, vol. XI, no. 4, pp. 363-375, 2004. [9] Schreiber H. H.: „Fault dictionary based upon stimulus design”, IEEE Transactions on Circuits and Systems, vol. 26, no. 7, pp. 529-537, 1979. [10] Bartosiński B., Zielonko R.: “New classes of complementary signals”. Electronic Letters, vol.23, no. 9, pp. 433-434, Apr. 1987. [11] Bartosiński B., Zielonko R.: “Application of Complementary Measuring Signals to Testing of Analog Circuits”, Third International Symposium on Methods and Models in Automation and Robotics, Poland, pp. 527-532, 1996. [12] Załęski D., Bartosiński B., Zielonko R.: “Application of Complementary Signals in Built-In Self Testers for Mixed- Signal Embedded Electronic Systems”. IEEE Transactions on Instrumentation and Measurement, vol. 59, 2010, pp. 345- 352. [13] Czaja Z., Zielonko R.: “Fault diagnosis in electronic circuits based on bilinear transformation in 3-D and 4-D spaces”. IEEE Transactions On Instrumentation and Measurement, vol. 52, no. 1, pp. 97-102, 2003. [14] Załęski D., The Autodiagnostics of Electronic Embedded Systems, PhD dissertation, Gdansk University of Technology, 2013. (in Polish). [15] Czaja Z., Załęski D.: ”Implementation of an input-output method of diagnosis of analog electronic circuits in embedded systems”. Proceedings of the 10th IMEKO TC10 International Conference on Technical Diagnostics, pp. 145- 150, Budapest, 9-10 June 2005. [16] Kowalewski M., The tolerance-proof vocabulary methods of fault diagnostic in electronic circuits using dedicated faults classifier with neural network, PhD dissertation, Gdansk University of Technology, 2012 (in Polish).