Final2 Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ١٩ Abstract: A modification to cascaded single-stage distributed amplifier (CSSDA) design by using active inductor is proposed. This modification is shown to render the amplifier suitable for high gain operation in small on-chip area. Microwave office program simulation of the Novel design approach shows that it has performance compatible with the conventional distributed amplifiers but with smaller area. The CSSDA is suitable for optical and satellite communication systems. Al-khwarizmi Engineering Journal Al-Khwarizmi Engineering Journal, vol.1, no.1,pp 19-25, (2005) A New Structure for Cascaded Single-Stage Distributed Amplifier Using Proposed Active Inductor Loads Keyword: Micro electronic, Microwave, Amplifier, Distributed Amplifier. 1 Introduction: The conventional distributed amplifier (CDA) was proposed in 1948 and originally applied to vacuum tubes [1]. With the development of monolithic microwave integrated circuits (MMIC) during 1960’s [2], the DAs have been realized by using on-chip transistor technologies such as MOSFET’s [3], and MESFET’s [4], as well as GaAs MESFET [5]. More recently many other technologies were introduced to the monolithic distributed amplifier world[6]. A schematic representation of a DA is shown in Figure(1). In this structure, the parasitic capacitors of the transistors (Cgs and Cds) together with the inductors (Lg and Ld) make two artificial transmission lines (gate and drain lines). As a result, the effect of these capacitors will be absorbed into Low-pass filter segments of the transmission lines then it is possible to obtain amplification over much wider bandwidth. The drawback of this amplifier is limited gain-bandwidth due to its optimum number of stages [7]. High gain can be achieved by cascading several single stage distributed amplifiers. The circuit structure of CSSDA is shown in Figure (2). It is essentially a cascade connection of single–stage distributed amplifiers with the omission of idle gate and drain termination for the intermediate stages [8]. The amplifier’s gate transmission line is formed by the lumped inductors LI and the gate capacitance Cgs of T1 where as the inductors Ld along with the drain capacitance Cds of TN serve as the drain artificial line. These input and output lumped transmission lines match the amplifier to the source and load impedance Ro over the entire bandwidth. The available power gain expression is given by [9]: 4 2)1(22 o N I N m RRgG − = …….(1) Where gm is the transconductance of the active devices. The input and output artificial lines possess much larger bandwidth compared with that of the inter-stage loads, therefore the bandwidth of the amplifier is limited by the cutoff frequency of internal stage (T2 -TN-1). Azad R. Kareem Control and Systems Engineering Dept./University of Technology Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢٠ 342 )1 1 1 () 1 1 ()2 1 2 ( 2 )1 1 1 ( 1 4 11 2 1 22 2 11 2 mmmmmm ww NNNNcic −++++−+= − −− − − − − It is given by: ……….(2) Where CRLm II 2/= , CdsCgsC += , and CRw Ici /1= is the cutoff frequency of the stages if there is no inductance in the drain line of the amplifier. Equation (2) can be written as follow: wc = wci . γ ……….(3) Table (1) lists some values of m and their corresponding to various values of γ for N=4. Referring to equation (1), it is clear that high gain is obtained with large RI. Since LI=mRI2 C, large RI mandates large LI for given m and C where by the size of the on-chip circuit will be increased. The goal of this paper is to study this problem and to put a suggestion for an effective size reduction for the on-chip circuit. 2 Implementation of On-chip Inductor: The main problem associated with the design of microwave integrated circuits, such as amplifiers, oscillators and mixers in which the inductors are essential elements is the physical size of these elements. Both resistors and capacitors are easy to implement. Considerable effort has gone into the design of the inductor implementation. Figure(3) shows the layout for different types of spiral inductors. For a given shape, an inductor is completely specified by the number of turns (n), the turn width (w), the turn spacing (s), and the turn diameters: din and dout , where davg = 0.5(din + dout). There are many expressions for the inductance value, one of them is given by a monomial expression that has the following form [10] 54321 αααααβ sndwdL avgout= ……….(4) Where the coefficients β and αi are layout dependent. For a square, β = 1.62 * 10-3 , α1 = 1.21 , α2 = - 0.147 α3 = 2.4 , α4 = 1.78 , and α5 = - 0.03. It is clear that the value of L depends on the size of its layout. 3 Proposed Active Inductor Implementation: Figure (4-a) shows a single stage distributed amplifier. The introduction of a current source transistor ML in the load circuit alters its frequency dependent impedance, Figure (4-b). =LZ = x x i V +R LCgw Rmg s 21 1 − + )( jwL )( RLgjwRZ mL +≈ …….(5) actL jwLRZ += where RLgL mact = …….(6) Equation (6) shows that the amount of amplification achieved in the inductance value is (gmR) which means that the effective inductance is (gmR) greater than the actually implemented one. This allows the use of a large value inductance in the circuit but with a small on-chip area. Although the new structure of the inductance composed of two elements instead of one, the transistor has a very small area compared with the area of the inductor. 4 CSSDA with Active Inductor Loads: Previous CSSDA’s have used large inductances at the drains. Increasing Table.1 m γ Response 0 0.9 0.5 1 1.53 1.34 No inductive load Maximum bandwidth Maximally flat Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢١ the gain of the amplifier is achieved either by increasing the value of RI in equation (1), or by increasing the number of stages (N). Since m = LI/RI2C, then large RI mandates large LI for a given m and C. On the other hand increasing N with a given value of LI means increasing the size of the amplifier. These two points yield circuits with larger on-chip area. However, Figure (5) shows the schematic of a CSSDA designed with a new type of inductors called “Active Inductors” , each one composed of an active device (Mi) plus a small inductor. Such implementation of inductors reduces the overall on-chip circuit area without any effect on the performance of the amplifier. The available power gain can also be determined using equation (1). A RF signal from a matched generator is coupled by the transconductance of the active device (Ti) at each stage, and finally terminated by the matched output load port. At each stage, the RF signal will be boosted and terminated by the load resistor (RI). The amplified signal is valid only up to the cut-off frequency, which is controlled by the elements values of equation (2). To demonstrate the effectiveness of the developed methodology, a four stage amplifier is designed with gain about 23dB and bandwidth of 10 GHz. The elements values are: RI = 40 Ω , LI = 0.42 nH , C = 0.6 pf , and gm = 0.06 1−Ω . The circuit was implemented using microwave office program. The S-parameters extracted from the measurement data are shown in Figure (6). The circuit is also implemented using active inductors (with LI = 0.1 nH and gm = 0.15 1−Ω ) and its measurement data are shown in Figure (7). It is interesting to note that, compared to the conventional CSSDA, the CSSDA with active inductor loads achieve the same results (forward gain S21 the reflection losses S11 and S22) but with smaller inductance. 5 Conclusion: In this paper a new design of cascaded single-stage distributed amplifier using the novel active inductor loads is demonstrated. The new structure has unique benefits over the conventional CSSDA in terms of high gain and area saving. The structure also allows very simple design procedure. A four-stage amplifier was implemented using the developed technique to achieve gain ≈23 dB and bandwidth ≈ 10 GHz. Hence, the CSSDA design is suitable for optical and satellite applications. References: E. Ginzton, W. Hewlett, J. Jasberg and J. Noe., “Distributed Amplification”, Proc. IRE. Vol.36, pp. 956-969, Aug. 1948. 1. R. A. Pucel, “Design Considerations for Monolithic Microwave Circuits”, IEEE Trans. Mic. The. Tech., Vol.29, pp. 513- 534, June 1981. 2. F. Schar, “Distributed Amplifiers Using Microstrip ”, Int. J. Electronics, Vol.34, pp. 721-730, 1973. 3. W. Jutzi, “A MESFET Distributed Amplifier with 2 GHz Bandwidth”, Proc. IEEE, pp. 1195-1196, June 1969. 4. E. W. Strid and K. Gleason, “ A DC-12 GHz Monolithic GaAs FET Distributed Amplifier ” IEEE Trans. Mic. The. Tech., Vol.30, pp. 969-975, July 1982. 5. M. Green, S. Lee, K. Chu, J. Webb, and F. Eastman, “High Efficiency Monolithic Gallium Nitride Distributed Amplifier ” , IEEE Microwave letters, Vol.10, pp. 270- 272, July 2000. Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢٢ 6. T. Wong, “Fundamentals of Distributed Amplification”, Artech House, 1993. 7. A. Worapishet, M. Chongcheawchamnan, and S. Srisathit, “Broadband Amplification in CMOS Technology using Cascaded Single-Stage Distributed Amplifier”, Electronics letters, Vol.38, pp. 675- 676, July 2002. 8. J. Y. Liang and C. S. Aitchison, “Gain Performance of Cascade of Single-Stage Distributed Amplifiers”, Electronics letters, Vol.31, pp. 1260-1261, July 1995. 9. S. Mohan, M. Hershenson, P. Boyd, and H. Lee, “Simple Accurate Expressions for Planar spiral Inductances”, IEEE J. of Solid-State circuits, Vol.34, pp. 1419-1424, Oct. 1999. Figure(1) Schematic circuit of N-stages CDA Figure(2) Schematic circuit of N-stages CSSDA Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢٣ Figure(3) On-chip spiral inductor realizations: (a) square, (b) hexagonal, (c) octagonal, and (d) circular. Figure(4) Single stage of DA.(a)simple common source amplifier.(b)the amplifier with active inductor.(c)the equivalent model of the active inductor. Vdd ML (a) (b) (c) Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢٤ Figure(5) Proposed CSSDA Figure(6) Simulated S-parameters in the CSSDA with passive inductors (LI= 0.42 nH) Figure(7) Simulated S-parameters in the CSSDA with active inductors (LI= 0.1 nH) 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 Frequency (GHz) dis -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 DB(|S[1,1]|) cssda DB(|S[2,1]|) cssda DB(|S[2,2]|) cssda 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 F requency (G Hz) dis -20 -15 -10 -5 0 5 10 15 20 25 30 35 40 DB(|S[1,1]|) cssda DB(|S[2,1]|) cssda DB(|S[2,2]|) cssda Azad R. Karee /Al-khwarizmi Engineering Journal ,vol.1, no. 1,PP 19-25 (2005) ٢٥ هيكلة جديدة للمضخمات التوزيعية باستخدام احمال حثية فعالة زاد رحيم كريمآ لـوجـيةوالجامـعة التكن/ قسم هندسة السيطرة و النظم :الخالصة البحث يتناول دراسة موجزة لمضخمات أشارات الترددات المايكوية ذات النطاق الواسع جدا باستخدام مبدا (Cascaded Single Stage Distributed Amplification) كبير في تطبيقات االتصاالت لالذي يستخدم بشك هذا النوع من المضخمات يضم في تركيبته محاثات في دائرة . البصرية و انظمة االتصاالت عبر االقمار الصناعية (integrated circuits) ةان حجم المحاثة هو احد اهم المشاكل التي ترافق تصميم الدوائر المتكامل. الخرج من المضخمات بحيث اصبحت تستخدم نوع مستحدث من المحاثات تقنيةال ههذتم تطويرلذلك , لالنظمة المايكروية التشكيل .الهدف االساسي منها هو انها تحتاج مساحة اقل عندما تصمم على الدوائر المتكاملة " محاثات فعالة"سميت الذي هو مختص باالنظمة المايكروية وكانت نتائج (Microwave Office)ام برنامج الجديد للمضخم أختبر باستخد . التقليدي مع فرق انه يحتاج حجوم اصغر للمحاثات للمضخم الجديد مطابق بكفائته المضخماالختبار هو ان