TEMPLATE FOR ACADEMICA SCIENCE JOURNAL AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 274 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. OPTIMAL CAPACITOR PLACEMENT TO REDUCE ACTIVE POWER LOSSES AND HARMONIC IN UNBALANCE DISTRIBUTION SYSTEM Inaam Ibrahim ALI University of Technology, Al sinaeuh Street, Baghdad, Iraq. Email: 30037@uotechnology.edu.iq Received on 27 September 2016 Accepted on 9 August 2017 Abstract: This paper proposed an algorithm to find the best location of shunt capacitor and size to reduce the total active power loss and harmonics consideration after assuming electric arc furnace (EAF) in the unbalanced radial distribution network. Demonstrated the results by using practical software (CYMDIST) as a tool, to determine power flow and find the best capacitors size and location that decrease power loss and improve voltage profile. The total harmonic voltage distortion at system does not exceed the maximum allowable total harmonic voltage distortion level (THVD%) compared with IEEE-standard 519-1992. To attain the goal of this algorithm, these algorithms are tested in 25-buses un- balanced radial distribution system and an actual part of Baghdad city distribution network that is content 66-bus for Al_JIHAD_feeder_5 11 kV network are depicted for the implementation of this analysis. Keywords: Unbalanced distribution system, Capacitor placement, CYMDIST software, Active power loss, Harmonic voltage distortion level (THVD %). INTRODUCTION The electric distribution network is becoming large and complex causing the increasing of the load then produce losses and result in increased ratings of distribution components [1]. The power loss is significantly high in distribution networks because of lower voltage levels and higher currents, when compared to transmission systems. Studies have indicated that as much as 13% of total power generated is consumed as I 2 R losses in the distribution sector.This non-negligible amount of losses directly impacts financially and reduces the overall efficiency of the power system. These losses cannot be eliminated but can be reduced [2]. One of the most effective and useful methods in reducing the power losses of distribution networks is utilization of optimal capacitor placement. By using shunt capacitors, the reactive power needed for loads is pro-vided so that besides the reduction of losses the voltage profile of nodes is also improved. There are, of course, numerous difficulties in optimal placement of capacitors in the purpose of reducing losses. These problems include: i. Non-clarity of the behavior of feeders’ loads, particularly domestic loads, ii. Complexity of distribution net-works, iii. Variety of the type of network loads. Reactive power compensation plays an important role in the planning of an electrical system. The amount of compensation provided is very much linked to the placement of capacitors in the distribution mailto:30037@uotechnology.edu.iq AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 275 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. system, which is essentially determination of the location, size, number and type of capacitors to be placed in the system. The power system harmonic analysis is to determine the impact of harmonic producing loads on a power system. Addition load in the network such as electric arc - furnace (EAF) is an un-balanced, nonlinear and time varying load, which can cause many problems to a distribution system and other users. The Voltage-Current characteristic of the arc is non-linear, that may cause harmonic currents. These currents, when circulating by the electric net can produce harmonic voltages, which can affect to other users. In reference [4], the electrical model of an electric arc furnace integrates with the thermal model for its performance evaluation. The effect of different arc furnace models on voltage disturbance is reviewed in [5, 6]. Furthermore, in three phases unbalanced distribution network, Real coded genetic algorithm [7] and, Index vector method are applied to find capacitors best location and size in unbalanced redial distribution system [8]. Limited work has been devoted to the literature to find the best optimal capacitor placement in un- balanced distribution system, and limited attention is given to this problem in the presence of voltage and current harmonics. The contribution of this work presents harmonic and loss minimization in unbalanced distribution system by finding the best location and sizing of shunt capacitors. 1. PROBLEM FORMULATION 1.1 OBJECTIVE FUNCTION The proposed objective function which has to be minimized can be expressed as follows: ………………..(1) Where; Pl: total power losses (kW); are the fundamental and Harmonic components for total power losses (kW) respectively; hmin and hmax: is minimum and highest order of harmonics. 1.2 PROBLEM In addition to the minimization of the objective function, the following constraints should be satisfied: i. The power factor constraint: P.F. of the network is not permit less than 0.8. ii. THD constraint: Total harmonic voltage distortion (THVD %) for the system must be less than or equal to 5%, as refer to by the IEEE standard 519-1992[9]. iii. Capacitor constraint: The reactive power injected (kVAr)) should not be exceed the total reactive power demand in the network or system source. .................(2) Where; 𝑄𝑐: is the total reactive power injection; 𝑄: total reactive power demand before injection. The injections (kVAr) based on the standard capacitor sizes by ABB (according to IEEE and IEC standard) in kVAr are: 50,100, 150, 300, 450, 600, 750, 900, 1200, etc. [1]. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 276 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. 1.3 HARMONIC LOAD FLOW ANALYSIS STUDIES FOR UNBALANCED DISTRIBUTION SYSTEM Due to the un-balanced line sections and loads in distribution networks, three phase models should be used in harmonic analysis. For example, the impedance matrix of a three phase line section [Z abc ] can be expressed as [10]: .....................(3) where : , , are self impedances in phase a, b, and c respectively. is mutual impedance between phases a and b. is mutual impedance between phases b and c. is mutual impedance between phases c and a. The results of distortion level and voltage wave forms are useful to verify compliance with harmonic limits. Harmonic power flow can be presented mathematically as [11]: .......................(4) .................... (5) Where: [Z h ], [Y h ]: are the network impedance and admittance matrix of a distribution system for the h th - order harmonic matrix respectively. [I h ]: is the harmonic current injection of network. [V h ]: is the harmonic voltage; and (h) is the harmonic order. The voltage THDs after the harmonic propagation of each order has been solved can be represented as: . THDS (%) = ................(6) Where: THDs (%): total - harmonic distortion in the system. : the normal voltage on the busbar to the harmonic frequency. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 277 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. No No 2. THE PROPOSED ALGORITHM The proposed algorithm for optimal capacitor placement in a radial distribution feeder is summarized by the flowchart shown in (Figure 1). Figure 1. Flowchart of capacitor placement for the search of best suitable location and sizing in un-balanced radial distribution feeder using CYMDIST program. Start Input data (R, X, and loads) Run the unbalanced load flow analysis for the original feeder Put - Qc at the far end bus from the substation using CYMDIST program Run load flow analysis THD S-voltage 5 % pf > 0.8 Add new Qc using CYMDIST program Re-move Qc , and put prior values of Qc Run the load flow analysis Constraints satisfied? Put Qc at the next bus Stop Yes Yes AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 278 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. 3. SIMULATION AND RESULTS In this paper two cases have been studied, investigate the effect of the capacitor placement in a proper location with harmonics consideration after assuming electric arc furnace (EAF) in the unbalanced distribution network. The first case studied was to verify the applicability of CYMDIST program on a standard distribution system whose Harmonics Analysis results are well documented in the literature based on standard IEEE- 519-1992. The standard system considered was the IEEE 25- bus un-balanced radial distribution network. Finally, the proposed method was implemented using a practical system from the distribution network in Baghdad city. 3.1 CASE 1: TEST SYSTEM To attain the proposed algorithm, these algorithm is applied on 25-bus un - balanced radial distribution network test system and schematic of this test system are shown in (Figure 2) with electric arc furnace (EAF), and its data are provided from [11]. Figure 2. Single Line Diagram of 25 Bus Un-balanced Radial Distribution Network with electric arc furnace (EAF) [11] This work uses an IEEE-519-1992 standard (IEEE recommended practices and requirements for harmonic control in electrical power systems) to comparison with test system which the value of THD-voltage (total harmonic voltage distortion THD %) the recommended voltage distortion limits must be lower than 5%. In 25-bus test system, the electric arc furnace (EAF) adding in the system. After using load flow analysis Kirchhoff's Current Law (KCL) and Kirchhoff's Voltage Law (KVL), the computed total active power losses is 241.16 kW and the measured maximum THD-voltage was 10.06 % phase A and B respectively and 10.05 phase C. To reduce the active power losses and THD, the optimal capacitor placement is achieved using AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 279 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. the proposed method using standard rating of single-phase capacitors by ABB (according to IEEE and IEC standard) are shown in following table 1. Table 1. Standard single-phase capacitor ratings. The injected reactive power (kVAr) is 3150 (kVAr), and the total active power loss reduced to 157.16 kW, whereas the maximum total harmonic voltage distortion are reduced to 0.36 % phase A,0.21% phase B and 0.14% phase C respectively, lower than uncompensated. The program result is shown in table 2. Figure 3. Single Line Diagram of 25 Bus Un-balanced Radial Distribution Network after adding capacitor placement with electric arc furnace (EAF). Table 2. The Comparison of 25- bus test system with IEEE-519 standard Limits. XC (KVAR) 50 100 150 200 300 400 500 600 Discretion Total Harmonic Distortion Voltage THD % Voltage p.u. Total active Power Losses (kW) A B C A B C 241.16 Without capacitor placement 10.06 10.06 10.05 0.921 0.921 0.921 With capacitor placement 0.36 0.21 0.14 0.983 0.982 0.981 157.16 AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 280 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Figures (4 to 7) show the wave form of the total harmonic distortion voltage and Harmonics order of voltage before and after capacitor placement. Figure 4. The wave form of voltage befor Compensation. Figure 5. Harmonic order of voltage befor Compensation. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 281 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Figure 6. The wave form of voltage after Compensation. Figure 7. Harmonic order of voltage after Compensation. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 282 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. 3.1.1 VOLTAGE PROFILE FOR THE IEEE 25-BUS TEST SYSTEM UN-BALANCED RADIAL DISTRIBUTION NETWORK WITH THREE-PHASE HARMONIC ANALYSIS. Figures 8 and 9 show the downstream voltage profile with respect to distance for the 25- Bus Test System un-balanced radial distribution network with electric arc furnace (EAF), before and after capacitor placement. Figure 8. Voltage profile for the 25-Bus Test System un-balanced radial distribution network before Compensation. Figure 9. Voltage profile for the 25-Bus Test System un-balanced radial distribution network after Compensation. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 283 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. 3.2 CASE 2: AL_ JIHAD SUBSTATION To implement the proposed method on an actual distribution network in Baghdad city the chosen network was Al_ JIHAD distribution network. The capacity of Al_ JIHAD (33/11 kV) substation is (2*31.5 MVA) delta-delta connection, which is fed by two 33kV feeders from Al-Jazayr and Al- Bayaa expansion substations (132/33/11 kV). There are fourteen (11 kV) feeders outgoing from Al- Bayaa substation serving a large area of mixed residential, commercial, industrial, and trading loads. The proposed analyses are implemented using the CYMDIST 4.5 (Rev.6) software and before starting, some assumptions are made in this work: i. Unbalance voltage drop iterative method is used, the maximum number of iterations is 40 for load flow and the voltage magnitude convergence error is set to be 0.01%. ii. The (rms) value of bus voltages will be kept inside acceptable tolerance limits (±5 %) after applying both optimal capacitor placement to verify objective function for the average peak demand and the study effect of total harmonic voltage distortion must be lower than 5% , within IEEE-519-1992 standard limits. iii. Load factor for the Al_ JIHAD distribution network is equal to 100%. 3.2.1 Al_ JIHAD Distribution Network This network is a part of the distribution network in Baghdad city which is rated at 11 kV, base MVA =100, and frequency of 50 Hz with (386) line sections, (375) buses, and 12 tie switches. The schematic diagram of Al_ JIHAD system is shown in figure (10). The load for Al_ JIHAD feeders is mixed, approximately 90% residential, 4% Industrial and 6% commercial. Only one feeder is considered in this work. The modeling of Al_ JIHAD distribution network is based on the actual positions of each bus. This coordination’s are taken from Iraqi ministry of electricity depending on the Global Positioning System (GPS). The coordinates are entered to the CYMDIST module as x and y coordinates for the buses to build the model and specify the actual length of the network sections. Unbalance loads in Feeder_5 for Al_JIHAD distribution network are distributed in all sections for each phase depending on the current and power factor values at the sending end of Feeder_5 and the secondary (11/0.4 kV) transformer (Delta- Grounded wye) connection. Figure 10. Initial configuration of Al_ JIHAD distribution network with the secondary transformers (11/0.4 kV). AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 284 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. After applying the load flow for the initial configuration to Al_ JIHAD distribution network, it can be noted that this feeder_5 operates in an abnormal condition with 21 sections at under voltage and 7 sections are over load as shown in Figure (11- a). Tables (3, 4 and 5) illustrate the optimal of capacitor placement and sizing, also the load summary before and after reactive power compensation. Figure (11-b) show the allocation of the capacitors at the receiving buses on Feeder_5. Figure 11. The Abnormal and normal conditions before and after optimal capacitor allocations for Feeder_5 in Al_ JIHAD distribution network. Table 3. Optimal location and size of capacitor placement for Al_ JIHAD distribution network at peak load conditions (100% loading). Al_ JIHAD - feeder_5 : P.F corrected to 0.99 Node Id Cap. kV (L-L) Total capacitor (kVAr) for all phase Loss reduction (kW) 10 11 600 15.8 17 11 600 7.7 22 11 900 6.2 33 11 450 10.8 37 11 900 2.9 Total 3450 43.4 AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 285 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Table 4. Load summary before and after kVAr compensation of Feeder_5 for the Al_ JIHAD distribution network at peak load. Al_ JIHAD Feeder_5 System load Total adjusted shunt capacitor + total conductor capacitances System losses System supply Before kVAr compensation kW 3755.5 --- 106.4 4661.9 kVAr 2918.19 0+3.39 3629.35 kVA 4756.01 --- 5908.09 P.F. 0.8 --- 78.91 Ampere/phase A 313.7 --- --- --- B 319.2 C 310.8 After kVAr compensation kW 3755.5 --- 64.95 4620.45 kVAr 2918.19 3343.84+3.56 247.87 kVA 4756.01 --- 4627.1 P.F. 0.8 --- 0.992 Ampere/phase A 245.4 --- --- --- B 246 C 238.5 Table 5. Summary of result of Feeder_5 for Al_ JIHAD distribution network. Al_ JIHAD Feeder_5 Voltage Before kVAr Compensation For Each Phase Voltage After kVAr Compensation For Each Phase A B C A B C Maximum voltage (p.u.) 1 1 1 1 1 1 Minimum voltage (p.u.) 0.944 0.943 0.944 0.975 0.974 0.975 The values of the harmonic contents are listed in Table (6) below for the effect electric arc furnace on Feeder_5 for Al_ JIHAD distribution network and the measured maximum total harmonic voltage distortion (THVD %) on phase A, B and C respectively before and after optimal capacitor placement in a proper location and sizing of Feeder_5 in Al_ JIHAD distribution network comparison with IEEE-519 standard 519- 1992 limits. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 286 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Table 6. Result total harmonic voltage distortion (THD %) for Al_ JIHAD - feeder_5 distribution network before and after capacitor placement. Figures (12 to 15) show the wave form of the total harmonic voltage distortion and Harmonics order of voltage for feeder_5 in Al_ JIHAD distribution network before and after capacitor placement. Figure 12. The wave form of voltage before Compensation Discretion Total Harmonic Voltage Distortion THD % A B C Without capacitor placement 3.09 3.09 3.09 With capacitor placement 0.06 0.06 0.06 AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 287 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Figure 13. Harmonic order of voltage before Compensation. Figure 14. The wave form of voltage after Compensation. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 288 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Figure 15. Harmonic order of voltage after Compensation. 3.2.2 VOLTAGE PROFILE FOR AL_ JIHAD - FEEDER_5 DISTRIBUTION NETWORK Figures 16 and 17 show the downstream voltage profile with respect to distance for feeder_5 in Al_ JIHAD un-balanced radial distribution network with electric arc furnace (EAF), before and after adding capacitor placement. Figure 16. Voltage profile for Al_ JIHAD - feeder_5 before adding capacitor placement. AL-QADISIYAH JOURNAL FOR ENGINEERING SCIENCES Vol. 10 , No. 3 ISSN: 1998-4456 Page 289 Copyright  2017 Al-Qadisiyah Journal For Enginnering Science. All rights reserved. Figure 17. Voltage profile for Al_ JIHAD - feeder_5 after adding capacitor placement. CONCLUSION Due to the increasing size and complexity of distribution networks, using the practical software as a tool for the simulation and analysis of such networks become a necessity. The proper location and sizing of the capacitors in redial distribution network resulted; reduction total power losses, improve voltage profile , and reducing total harmonic voltage distortion level. These results were obtained from simulation for; 25 - bus test system 1 and 66-bus of feeder_5 Al_ JIHAD network 2 . The simulation results show that the reactive power compensation by using proposed algorithm more reduction for total power losses and total harmonic voltage distortion (THVD %) compared with MATLAB (a novel approach direct search algorithm) and IEEE- standard 519-1992 respectively. Also, the minimum voltage in the phase (A, B and C), are improved from (0.944, 0.943 and 0.944 p.u) to (0.97, 0.974 and 0.975 p.u respectively) after adding the capacitor placement. REFERENCES 1. Fitriana, S.; Dimas, F. U.; Ontoseno, P. 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