id	author	title	date	pages	extension	mime	words	sentence	flesch	summary	cache	txt
cana-1861	Preeti R. Lawhale	FPGA Implementation of Compact Architecture for Lightweight Hash Algorithm for Resource Constrained Devices	2024	13	.pdf	application/pdf	5173	273	50	Experimental Results and Discussion 4.1 Implementation flowchart Figure 2 depicts the implementation of proposed framework based on FPGA design. Communications on Applied Nonlinear Analysis ISSN: 1074-133X Vol 32 No. 2 (2025) 686 https://internationalpubls.com Figure.3 Simulation result of lightweight hash with input1 Figure.4 Simulation result of lightweight hash with input2 Tables 1 show the full implementation of SHA256 on a range of ALTERA FPGA devices.	cache/cana-1861.pdf	txt/cana-1861.txt