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Application of Time Recursive Processing for the
Development of a Time/Phase Shifter
Djurdje M. Perisic
Faculty of Information Technology
Slobomir P University, SPU
Slobomir, Bjeljina, Republic of Srpska, BIH
djurdje@beotel.rs
Miroslav Bojovic
Faculty of Electrical Engineering
University of Belgrade
Belgrade, Serbia
mbojovic@etf.bg.ac.rs
Abstract—This paper describes a powerful digital time and/or
phase shifter of pulse rates, based on Time Recursive Processing.
It can function either as a time shifter or as a phase shifter. The
circuit can generate precise shifting for a pulse rate with a
constant input period, but it is also capable to shift a pulse rate
whose period is a ramp function. Besides that, the shifter can be
used in tracking and prediction applications. The shifter is
described by recursive equations as a linear discrete system. All
mathematical analyses are made using the Z transform.
Computer simulations are employed to prove the correctness of
the mathematical analysis. The realization of the shifter is
described and, to demonstrate the shifter functioning, actual
oscilloscope screenshots are presented.
Keywords- time shifter; phase shifter; digital circuit; PLL
I. INTRODUCTION
The field of Time Recursive Processing (TRP) has been
described in detail in previous works such as [1-9]. The TRP
approach is based on the measurement and processing of the
input and output periods and time differences between them.
Although the first idea was simply to discover a new kind of
Phase Locked Loop (PLL) and Frequency Locked Loop (FLL),
it turned out that TRP is suitable for a much broader range of
applications. Namely, most of the circuits described in [1-9],
possess some of the properties of either classic Phase Locked
Loop (PLL) or classic Frequency Locked Loop (FLL).
However, due to their properties, Time Recursive PLL (TR
PLL) and Time Recursive FLL (TR FLL) exceed the
applicability and functionality of classic PLL and FLL,
improving the efficiency and expanding the scope and diversity
of their applications. Different applications include phase
shifting in [1, 2], the development of digital frequency
synthesizers [3], noise rejection applications [4-6] and a wide
range of tracking and prediction [4, 5, 7]. All the algorithms
described are very suitable for usage in a software form, like
for example a software predictor [8]. Although a very complex
system, consisting of a lot of subsystems, it can also function as
a FLL, whose realization is based on the same technique [9].
TR PLL and TR FLL represent a completely new approach
both in theory and in implementation and application. For
example, the measurement of phase, frequency or amplitude,
which are used in classic PLL and FLL, are changed by the
measurement of time, which is much more convenient and
more precise. Let us remember that the classic PLL tends to
equalize both frequency and phase between the input and the
output signals, reducing the phase difference to zero. Unlike
PLL, classic FLL tends to equalize the frequency, without
taking care of the phase difference. When FLL reaches the
stable state, the phase difference between the input and output
signals depends on the initial variable conditions and, possibly,
it depends on the system parameters. In other words, the phase
difference is the random variable. According to [1, 2] some of
TR PLLs possess the ability to regulate the phase difference by
either system parameters or by output control. This is an
important feature of the TR PLL, which can be utilized to
generate phase differences of any value. Note that the phase
difference of any PLL cannot depend on the initial conditions
of the variables.
In this paper, a new model of a time/phase shifter, based on
TRP, is described. It provides phase shifting in a band without
limitations which is controlled by the clock frequency. Under
some system conditions, it can also provide time shifting
linearly dependent on the value of an outside control. In
comparison with the previous phase shifters of this type,
described in [1, 2], this phase shifter can generate the proper
shifting even in case the input period is a ramp function.
II. MATHEMATICAL DESCRIPTION OF THE SHIFTER
One general case of the time relation between an input
signal Sin and an output signal Sop of the shifter, is shown in
Figure 1. The periods TI0, TI1,….TIk, TIk+1, and TO0,
TO1,….TOk, TOk+1, as well as the time differences 0, 1,
2…..k, k+1, occur at discrete times respectively t0, t1, t2,…..tk,
tk+1. The discrete times t0, t1, t2,….tk, tk+1 are defined by the
falling edges of the pulses of Sop in Figure 1. Note that, unlike
the classic PLL, all variables are distributed in time in Figure 1.
The natural recursive relation (1), between the variables, yields
from Figure 1. It was supposed that the time difference is
positive if the output signal leads the input signal.
Correspondingly, in case that the input signal leads, time
difference will take a negative value through the analysis.
The main algorithm of the circuit is presented in (2), where
"Tk", as an outside control word, represents a step function and
"a" and "m" are the system parameters. According to (1) and
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(2), the circuit has two output variables, which describe its
behavior:
1k k k kTO TI (1)
1 1a kk k kTI T mTO (2)
Fig. 1. Time relations between all variables of the circuit.
The output variables are (k+1) = f[TI(k)] and TO(k+1) =
f[TI(k)]. Note that, because of simplicity, TO(k), TI(k) and (k)
are denoted in the article as TOk, TIk and k. It is now necessary
to find the Z transform of the output variables (k+1) and
TO(k+1) in order to analyze the properties of the shifter
described. The Z transform of (1) and (2) are given by
respectively (3) and (4). Time constants TO0 and 0 are the
initial values of the output variables TO(k) and (k), which
appear at discrete time t0 = 0.
0( ) ( ) ( ) ( )z z z z TO z TI z (3)
0 0a( ) ( ) ( ) ( )zTO z zTO TI z T z z z z m (4)
Calculating (z) from (3) and using it into (4), gives:
0 0z mz zz z
( ) (z 1)z(a m) a
( ) ( )
z(z m 1) z(z m 1)
T TO
TO TI
(5)
In the same way, changing TO(z) from (5) to (3), gives:
0 0(z) (z )a( ) ( )
(z m 1) (z m 1)
T z m TO zz
z TI z
z z
(6)
Two transfer functions, presented by (7) and (8), describing
the output variables of the shifter in dependence on the input
period, can be defined from respectively (5) and (6).
( ) z(a m) a
( )
( ) z(z m 1)TO
TO z
H z
TI z
(7)
( ) a
( )
( ) (z m 1)
z z
H z
TI z z
(8)
A. Step analyzes of the circuit
Step analysis will discover under which conditions the
circuit can possess the properties of a time/phase shifter.
Providing that the control time function T(k)=T=const., let us
suppose that a step function, TI(k)=TI=const., is applied to the
input. If we change the Z transforms T(z) = T·z/(z-1) and TI(z)
= TI·z/(z-1) into (5) and (6), we will get the Z transform of the
output variables for this input. Changing T(z) and TI(z) into
(5) and using the final value theorem, it is possible to find the
final value of the output period in the time domain as TO =
lim TO(k) if k, using TO(z), as shown in (9). Applying (9),
TO is calculated as shown in (10). To complete the
information about the system properties, it is necessary to
determine ∞, i.e. the final value of (k). If T(z) and TI(z) are
changed into (6), using the final value theorem in the same way
like for TO, ∞ can be determined using (11). Applying (11),
∞ is calculated and shown in (12).
1lim[( 1) ( )]zTO z TO z (9)
lim[ ( )]kTO TO k TI (10)
1lim ( ) lim[( 1) ( )]k zk z z (11)
(1 ) / /TI a m T m (12)
The expressions (10) and (12) are valued only if the shifter
is the stable system i.e. if |z1| < 1 and |z2| < 1, where z1 and z2
are the poles of the transfer function HTO(z) or H(z), given by
(7) and (8). Since z1 = 0, and z2 = 1+m, it yields that the shifter
is the stable system if (13) is satisfied. According to (10) and
(12), it follows that the described shifter possesses the
properties of a PLL. This conclusion comes out from the facts
that the output period TO, for the stable system, equalizes the
input period and that the time difference does not depend on
the initial conditions 0 and TO0.
2 0m (13)
B. The time and/or phase shifting
Looking at (12), we can notice that total value of
consists of two parts. The first one is TI(1-a)/m. The term (1-
a)/m indicates the portion of a period TI, or the number of
periods TI, for which the input pulse rate is phase shifted.
According to its nature, the first part represents the phase
shifting. The system stability does not depend on the parameter
"a", so that the value of either positive or negative phase
shifting is unlimited. The second part is equal to "-T/m". It
represents the pure time shifting, which is controlled by "T". It
can also be ether positive or negative. Since control word "T"
does not affect on the system stability, this kind of shifting can
be also unlimited. So, two kinds of shifting can be generated
simultaneously. But they can be also generated separately. If
a=1, the first part in (12) does not take part in the shifting. At
the same time, if control time function T=0, the second part in
(12) has no effect on the shifting.
To prove the correctness of the previous analysis,
simulations of the shifter functioning are presented. At the
same time, the simulations are employed to enable a further
insight into the procedure and into the physical meaning of the
variables described. The simulations are also used to discover
additional properties and possible efficient applications of the
shifter. All discrete values in simulations were merged to form
continuous curves. Note that all variables in the following
diagrams were presented in time units. The time unit can be,
sec, msec or any other, but assuming the same time units for
TI, TO, and T. It was more suitable to use just “time unit” or
abbreviated “t.u.” in the text. It was more convenient to omit
the indication “t.u.” in diagrams. All simulations were made by
Matlab, using (1) and (2).
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Let us first consider the time shifting, taking a=1. The
locking procedure of the shifter is considered for three cases in
Figure 2. The input is a step function TI = 10 t.u. The parameter
"m" and control word "T" are chosen carefully in order to
demonstrate the different properties of the shifter. All values of
"m" and "T", as well as the values of the initial conditions TO0
and 0 are presented in Figure 2. It can be seen in Figure 2a,
that for any value of "m" satisfying (13), the output period
tends to the input period, but the transition time depends on the
value of "m". For case Nr. 2, (m=-1) the shifter is extremely
fast. It reaches the stable state for only two steps. For case Nr.
1, (m=-0.85), and case Nr. 3 (m=-1.2), the shifter takes longer
time to reach the stable state. The conclusion is that the greater
deviation of parameter "m", with respect to m=-1, provides
longer transition time of the shifter. Note that for all three
cases, the calculation of ∞=-T/m agrees with ∞ which can be
seen on the simulated curves. For instance for case Nr. 2, ∞=-
T/m=-(-3)/-1=-3. The same result can be seen in Figure 2a.
This agreement confirms the correctness of the simulation
results and the correctness of the whole approach.
Fig. 2. Time shifting (a=1 for all of three cases): a. The output period
tends to the input period and the final value of time difference ∞ = -T/m, b.
The case Nr. 3, in Figure 2a, is presented in the real time form. All periods of
Sin, Sop and time differences k are calculated, showing the real time relation
between them. For this case, T=0 (∞=0) and the shifter functions as a classic
PLL.
The merged discrete values for case Nr. 3, representing the
output variables TO3 and 3 in Figure 2a, are shown in real
time, in Figure 2b. This presentation, in forms of pulse rates,
exhibits the real time relations between all input and output
variables. It also helps to better understand the physical mining
of the simulated curves. The calculated values of all variables
are shown for every step. All values are taken from the
simulation results, but they can be calculated manually, step by
step, using (1) and (2). According to the mathematical analyzes
and simulation results obtained, the shifter functions as classic
PLL for T=0 and a=1. The negative values of the time
differences k are shaded in Figure 2b.
Let us now consider the properties of the circuit in case that
it functions as the phase shifter. In this case, according to (12),
T=0 and ∞= TI(1-a)/m. The locking procedure of the shifter is
simulated for three cases in Figure 3. The input is the step
function TI = 10 t.u. All values of "m" and "a", as well as the
values of the initial conditions TO0 and 0 are presented in
Figure 3. It can be seen in Figure 3a, that the role of parameter
"m" is not changed. For any value of parameter "m" satisfying
(13), the output period tends to the input period, but the
transition time depends on the value of the parameter "m". For
case Nr. 2, (m=-1) the shifter reaches the stable state for only
two steps. The conclusion is the same as in the case of the time
shifter. The greater deviation of parameter "m", with respect to
m=-1, provides longer transition time of the shifter. Although
the parameter "m" affects ∞, it is much more convenient to use
"a" for the phase shifting. For case Nr. 2, a=1 and 2∞=0,
regardless of the values of "m". In this case phase shifter
functions as a classic PLL. For case Nr. 1, a=1.16 (a> 1) and
1∞=TI(1-a)/m = 2 t.u. The same result for 1∞ can be seen in
Figure 3b. For case Nr. 3, a=0.75 (a<1) and 3∞=TI(1-a)/m = - 2
t.u. The same result can be also seen in Figure 3b.
Fig. 3. Phase shifting (T=0 for all of three cases) in the function of
parameters "m" and "a": a. The output period tends to the input period, b. The
final value of time difference ∞ = TI(1-a)/m, c. The final value of the phase
shifting is Ph∞ =2π·∞/TO∞ [rad] = 2π·(1-a)/m [rad].
This agreement confirms the correctness of the simulation
results and the correctness of the mathematical approach. We
can now reach the general conclusion about the influence of
parameter "a" to the phase shifting. If a>1, the phase shifting is
positive. If however a<1, the phase shifting is negative. Since
the parameter "a" does not affect the stability of the system,
both of them, the positive and the negative shifting can be
unlimited. The only limitation is the capacity of the circuits
which are built in the shifter. The general expression for the
phase shifting, for both, the time and the phase shifter, can be
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expressed as Ph∞ = 2π·∞/TO∞ [rad]. Changing ∞=TI(1-a)/m
for the phase shifter, and taking in account that for the stable
shifter TI=TO∞, the expression turns into Ph∞ = 2π·(1-a)/m
[rad]. The transition state, as well the stable state, for all of
three cases of the phase shifting are presented in Figure 3c.
According to the previous expression, Ph1∞=2π·(1-1.16)/(-
0.8)=1.25 [rad], Ph2∞=2π·(1-1)/(-1)=0 [rad] and Ph3∞=2π·(1-
0.75)/(-1.25)=-1.25 [rad]. All of calculated results agree with
the simulated ones, shown in Figure 3c.
C. The shifting in case when the input is a ramp function
Besides the described shifting for the case when the input
period is a step function, the time shifter (a=1) can be used for
the shifting of an input pulse rate, whose period is a ramp
function. To illustrate this ability, let us determine the well
known velocity error, providing that the input period is the
ramp function TI(k)=TIV(k)=p∙k, where “p” is a time constant.
The definition of velocity error is KV=lim[TOV(k)-TIV(k)] for
k→∞. One more convenient expression for velocity error is KV
= lim TIV(k)[HTO(k)-1] for k→∞, where HTO(k) is the transfer
function given by (7). Taking a=1 and using the previous
expression and Z transform of velocity function TI(z)=TIV(z)=
Z(p·k)=pz/(z-1)2, it can be found out that KV = 0. This means
that the output of the shifter is capable to track the ramp input,
without an error.
In order to consider the shifting abilities of the circuit, let us
now determine the behaviour of τV(k) for the velocity (ramp)
input, if k→∞. Using the final value theorem, τV∞=lim τV(k)k→∞
is calculated using τV(z) and shown in (14). The expression
τV(z) is get out by the substitution of TI(z)=TIV(z) in (6) and
taking a=1. According to (14), τV∞ is the time constant, which
does not depend on the initial conditions. Besides the
parameters "m" and "T", τV∞ depends on the time constant "p",
1lim[( 1) ( )] ( ) /V V zz z p T m (14)
which is the slope of the ramp input function. It means the time
shifting of the output pulses can be controlled by the control
word "T". If T>p, τV∞>0 and the output pulse leads in time, just
like in Figure 1. If however T<p, τV∞ is negative and the output
pulse is delayed in time, in comparison with the corresponding
input pulse. It comes out that if T=p, τV∞ = 0, i.e. the shifter
functions as classic PLL, reducing the phase difference to zero,
even for the ramp input function. To check the correctness of
the obtained results, the simulations of TO(k) and (k) for the
velocity input TIk=(10+4·k) t.u. are shown in Figure 4. Three
cases for different parameters “m” and “T” are presented. All
initial conditions and final values are shown in Figure 4. For all
of cases in Figure 4a, the output periods track the input periods
without an error. That means KV = 0, which agrees with the
previous theoretical conclusion. Note that the shifter takes only
two steps to reach the stable state for m=-1, regardless of the
fact that the input is the ramp function. For all cases in Figure
4b, time differences tends to the time constant "(p-T)/m", given
by (14), proving the correctness of the mathematical analyses.
For case Nr. 2, T=p=4 t.u. and according to (14), V2∞ = 0. That
means the shifter predicts and generates the output period
which is completely synchronized with the input pulses, even
for the case when the input is a ramp function. For case Nr. 1,
V1∞=(p-T)/m=(4-7.75)/(-0.75)=5 t.u. For case Nr. 3, V3∞=(p-
T)/m=[4-(-2)]/(-1.25)=-4.8 t.u. The calculated results agree
with the simulated ones, shown in Figure 4b. Cases Nr. 1 and
Nr. 3 prove that the shifter is able to generate both positive and
negative shifting of the pulses of a ramp input, depending on
the parameter "T". For case Nr.1 T>p (V∞>0), the output pulses
lead for V∞+ in comparison with the input pulses. For the case
Nr. 3, T<p (V∞ <0), the output pulses are delayed for V∞ in
comparison with the input pulses.
Fig. 4. The time shifting of the ramp input function (a=1): a. The output
periods, for all of three cases, track the input periods without an error, Kv=0,
b. The time shiftings tend to the time differences V∞, given by eq. (14).
III. REALIZATION OF THE SHIFTER
According to the results obtained, the optimum value of
"m" for the shifting applications, is m=-1. Firstly, the shifter is
the fastest for m=-1 and secondly the realization of the shifter
is much simpler if m=-1. For some other applications, where it
is necessary to adapt the locking speed, different values of "m"
can be required. Taking m=-1, and changing a=fa/fc, where fa
and fc are the clock frequencies, (2) turns into (15). According
to (15), Tk and k+1 are measured by the clock period tc=1/fc, TIk
is measured by the clock period ta = 1/fa and TOk+1 is generated
by the clock period tc=1/fc. The principal scheme of the
realization, corresponding to (15) is shown in Figure 5.
1 1c a c k ck k kf TI f T ff TO (15)
Fig. 5. The principal scheme of the phase shifter
The shifter consists of a Recursive Calculation Module
(RCM) and a Programmable Period Generator (PPG). RCM
calculates TOk+1 and PPG generates the output period at the
next step. PPG was described in detail in [1-9]. The realization
of RCM depends on the type of algorithm, but the realization of
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RCM according to (15), can be easily performed using the
technique described in [1-9]. According to the previous
conclusions, if fa=fc (a=1), the circuit functions as time shifter.
If however fa is not equal to fc and Tk=0, the circuit functions as
the phase shifter. One eight bits shifter was realized by
standard integrated circuits for a=1 (fa=fc), T=0 and m=-1. The
input period, shown in Figure 6, is the step function TI=1 [ms],
corresponding to the frequency of 1[kHz]. The clock frequency
fc=6 [kHz], so that the ratio TI/tc=6. The oscilloscope picture of
the voltage waveforms, shown in Figure 6, was taken when the
shifter was in the stable state. In accordance with the chosen
parameters, the shifter functions as a classic PLL, striving to
reduce the time difference to zero. However, that is not
possible because the ratio TI/tc is very small. The ratio TI/tc is
chosen intentionally small to enable the visibility of ∞+ and ∞-
and to provide the evidence of the whole physical process. In
accordance with the chosen parameters, the time difference ∞
is changing the sign at every step. If TI/tc increases, the widths
of ∞+ and ∞- would decrease and tend to zero. It can also be
seen in Figure 6 that whenever two pulses of Sop occur during
a period TI, it means that TI > TO, and the coming “∞” is
negative. If two pulses of Sin comes during a period TO, it
means that TO > TI, and the coming “∞” is positive. The
previous explanations, at the same time, contribute to the
understanding of the principles of the shifter functioning.
Fig. 6. The shifter is in the stable state. It functions as PLL (a=1, m=1,
T=0). The ratio TI/tc is only about six and the time differences ∞+ and ∞- are
visible. If TI/tc increases, the time differences tend to zero.
IV. CONCLUSION
The description and illustration of the realized shifter
represent one additional contribution to the shifters described in
[1, 2]. The presented theoretical approach in whole, also
represents the contribution to the field of TRP. It was
demonstrated that besides the processing of the input and
output periods and the time differences between them, an
additional control function can take part in the calculation of
the output period. In dependence on the type of the control
function, the shifter takes new properties. For instance, it was
shown that if the additional control function is a step function,
the shifter is able to provide the proper shifting even in case the
input period is a ramp function. This example indicates that,
using this approach, it is possible to develop new additional
applications of the circuits and systems based on TRP.
In comparison with the shifters described in [1, 2], this
shifter provide important advantages consisting of the better
functionality and the wider applicability. Firstly, unlike the
mentioned shifters, this time shifter provides both the time
shifting and the phase shifting. Secondly, the time shifting does
not depend on the input period, so that the desired value of
either positive or negative shifting is directly proportional to
the outside control word. This property significantly facilitates
its practical realization and its practical usage. Thirdly, this
shifter can generate either a positive or negative shifting of the
input pulse signal, even in case the input period is a ramp
function. This feature provides a much wider field of
application.
It was shown that if T = 0, the shifter can function exactly
as classic PLL, which has already found a number of
applications. The analysis and simulations showed that this
phase shifter is extremely fast if m=-1. In this case, the shifter
takes only two steps to reach the stable state. Changing m in
range of -2 to 0, it is possible to adapt a transient time of the
shifter to the required application. The precision of the phase
shifting can be extremely high. It is limited however by the
speed of the used integrated circuits, since it depends on
relation TI/tc. A higher TI/tc relation provides a higher shifting
resolution. Generally, the shifting band can be as large as
necessary. However, the capacity of the built-in up-down
counters must be large enough to satisfy the requirements for
the shifting band and the shifter resolution. The identity of the
analytical and simulation results, in every step, proves the
correctness of the entire theoretical approach, as well as the
validity of the obtained results.
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ACKNOWLEDGEMENT
This article was supported by the Ministry of Science and
Technology of the Republic of Serbia within the project TR 32047.
AUTHORS PROFILE
Djurdje Perisic was born in Atenica near Cacak, Serbia in
1943. He graduated from the Faculty of Electrical Engineering
in Belgrade in 1967. Through an English government
scholarship, he received an M.Sc. from the Cranfield Institute
of Technology, England in 1976. He received a Ph.D. at the
Technical Academy in Zagreb in 1983. After that he was
awarded twice the Fulbright and once the Humboldt
scholarship. He was awarded the "Tesla’s award", the highest
Yugoslav recognition for contributions to the field of natural
sciences, from the Serbian Academy of Sciences in 1996. In
2003, as the dean of the faculty, he founded the first study
programs for the Faculty of Information Technology at SPU.
In 2013 he was elected a professor emeritus. His current
research interests include the development of new approaches
to electronic circuits and systems combining electronics,
system theory and other fields. During last five years he has
published fifteen papers in SCI list journals and about 40
additional papers of international importance.
Miroslav Bojovic was born in 1957. All his formal education,
including the Ph.D. (1989) are from the Faculty of Electrical
Engineering, University of Belgrade, Serbia. He realized the
specialization at the faculty of Computer Science Department,
UCLA, Los Angeles, USA, during 1988 and 1989. As a Head
of the Computer Science Department at the Faculty, he is
currently engaged as a professor at the Faculty of Electrical
Engineering in Belgrade in the field of Database menagement
System and Software Engineering and as a project leader of
many projects in Software engineering. One of his projects
"MobilePDR" was awarded as the best software product in
USA in the field of medical information systems in 2004. As a
software product, it has been referenced in more than 100,000
different publications, all over the world.