10486 FACTA UNIVERSITATIS Series: Electronics and Energetics Vol. 35, No 3, September 2022, pp. 421-435 https://doi.org/10.2298/FUEE2203421M © 2022 by University of Niš, Serbia | Creative Commons License: CC BY-NC-ND Original scientific paper CONTROL OF SERIES IMPEDANCE OF POWER LINES USING POWER FLOW CONTROLLER Aleksandar Aco Marković1,2, Slobodan Vukosavić2,3 1University of Banja Luka, Faculty of Electrical Engineering, Banja Luka, Republic of Srpska, Bosnia and Herzegovina 2University of Belgrade, Faculty of Electrical Engineering, Belgrade, Serbia 3Serbian Academy of Sciences and Arts, Belgrade, Serbia Abstract. In this paper, the possibility of unified power flow controller (UPFC) to modulate both series resistance R and series reactance X of an overhead power line is discussed. The classical power flow control system of the UFPC is modified in the manner that standard input references signals (active and reactive powers) are replaced by reference signals of series resistance and reactance. Using the procedure described in this work, the reference signals for active and reactive powers are generated indirectly. The operation of UPFC in proposed operation mode is analyzed using computer simulation, based on a model of single machine infinite bus (SMIB) with constant impedance loads and two parallel lines. The goal is to show that UPFC is capable to control both series line parameters (R and X) directly and independently by means of a simple control system without additional decoupling controllers. An additional task is to show that power flows can be indirectly controlled this way. The step response of series line resistance and reactance is used to validate the operation of the proposed control system. The obtained results clearly show that all goals are fulfilled. Key words: unified power flow controller, impedance regulation, power system, power flows 1. INTRODUCTION With introduction of variable sources in ac grids, with electronically controlled loads, integrity of the grid is challenged by reduced system inertia, limited support for transients from power electronics devices, and with quite new and different static and dynamic properties of the sources and loads that interface the ac grid through grid side inverters. At the same time, electric power required to run the Internet and digitalization is rising steadily, while the process of decarbonization of the transport by means of electrification requires further increase in electric energy demand. These growing trends have great Received February 16, 2022; revised April 4, 2022; accepted May 25, 2022 Corresponding author: Aleksandar Aco Marković University of Banja Luka, Faculty of Electrical Engineering, 5 Patre, Banja Luka, 78 000 Banja Luka, Republic of Srpska, Bosnia and Herzegovina E-mail: aleksandar-aco.markovic@etf.unibl.org 422 A. A. MARKOVIĆ, S. VUKOSAVIĆ impact on power system which must respond on increasingly complex requirements. Some of these requirements are: the response time of the system, stability margin and quality of electrical energy delivered to the consumer. To fulfill all the requests, flexible alternating current transmission system (FACTS) devices are introduced into the system. The most complex and the most substantial device of all FACTS is unified power flow controller (UPFC). The main reason for introduction of UPFC into the system is the need for independent control of active and reactive power flows in power systems [1]. Currently, UPFCs are mostly used in two different operation modes: either voltage and power flow control mode or active power oscillation reduction mode. There are a lot of proposed algorithms for both operation modes. Control algorithms for voltage and power flow control are often based on proportional – integral (PI) controllers. The simplest control system is described in dq – reference frame and it generates the desired UPFC voltage reference out of the acquired feedback signals [2]. The feedback signals are usually line currents as well as active and reactive powers. There are several similar control systems with only a small difference between them in their parameter setting for achieving better performance or faster response [3-5]. However, some authors prefer using several feedback signals (up to three) to achieve better performance and faster stabilization [6],[7]. This way, several PI controllers are connected in cascade, thus reducing the phase margin with negative impact on stability and robustness. These problems are not discussed in literature. Besides PI controller, some novel approaches are discussed too, such as fuzzy controllers and neural networks. These types of controllers are suitable for nonlinear systems like power system. Fuzzy controllers are used in hybrid version, where only P control of PI controller is fuzzy – based and everything else is classical PI control [8]. More complex approach uses complete PI controller based on fuzzy logic [9 - 11]. It is noted that fuzzy based control schemes provide faster response, on the account of a rather complex and involve selection of suitable membership function types and domains, mostly performed on trial-and-error bases, rather than using exact mathematical procedure which would lead to predictable results. Additionally, said algorithms can be numerically extensive. Neural networks are also an option for UPFC control. Usually, simple algorithms based on radial basis neural networks using a single neuron in hidden layer with Gaussian activation function are used [8]. There is also a hybrid version of controller which uses classical PI control combined with neural network. Neural network based on back propagation error, uses deviation of variables of interest to generate the output which is summarized with the outputs of PI controllers [12]. The latest approach is to use neural network based controllers to generate auxiliary signals for active power oscillations reduction [13]. This way faster response and attenuation of active power oscillations can be achieved. However, these algorithms have also several shortcomings. Their main disadvantage is that their stability cannot be mathematically proven [14] and they are rather complex for practical implementation. It can be seen that almost all algorithms in relevant literature use active and reactive power and nominal bus voltage as reference signals. Some modifications of these algorithms use d and q axes currents which are calculated using active and reactive power references. There are some attempts to use UPFC for reactance control [6], [15], [16]. However, in these works UPFC is used only as a shunt device, so it is not capable of controlling resistance in this operation mode. Sometimes, the term “impedance control” is used to describe reactance control, as it is explained in [17]. Authors didn’t find any relevant literature dealing with the use of UPFC for independent control of series line resistance and reactance. Control of Series Impadance of Power Lines Using Power Flow Controller 423 In this paper, control solution is proposed where series resistance R and series reactance X are treated as reference signals, while the UPFC performs complete emulation of the series impedance. This means that UPFC generates the appropriate voltages to maintain series resistance and reactance on desired levels, thus exploiting the whole potential of the UPFC hardware. 2. TOPOLOGY AND MATHEMATICAL MODEL OF UPFC In this section topology of standard UPFC system is discussed. Additionally, mathematical model of UPFC suitable for series power line impedance modulation is derived based on classical power flow UPFC model. All mathematical equations are self – driven based on proposed equivalent schemes. 2.1. UPFC Topology Topology of an UPFC device is shown in Fig. 1. Fig. 1 Topology of UPFC In Fig. 1, UPFC is connected on bus k, and it can control power flow between buses k and k+1, along the power line with impedance ZT. This device constitutes of two power converters (PC1 and PC2), which operation is based on power electronics switching devices. The first UPFC, installed in the USA, used gate turn – off (GTO) thyristors as switching devices, which operated on grid frequencies. Latest UPFCs, installed in China, use insulated gate bipolar transistors (IGBT) as switching devices, combined in modular multilevel converters (MMC) and they operate on frequencies near 1[kHz] [18],[19]. In UPFC topology, two power transformers are obligatory (TR1 and TR2, Fig. 1). Shunt transformer (TR1) is a classical power transformer. Series transformer (TR2) has much more complicated construction since it has to withstand line current and sometimes even short circuit currents for a small fraction of time. Auxiliary transformers (ATR1 and ATR2, Fig. 1) are not always necessary. They are usually used in cases when GTOs are used in power converters to create appropriate phase shift. Series transformer (TR2) and series converter (PC2) create series part of UPFC which is called static series synchronous compensator (SSSC). Shunt transformer (TR1) and shunt 424 A. A. MARKOVIĆ, S. VUKOSAVIĆ converter (PC1) together create the shunt part of UPFC which is called static compensator (STATCOM). These two devices can operate separately from each other. However, when DC switch (DCS) is closed, shunt and series part share the same DC link and that configuration is called UPFC. In this configuration, it is possible to achieve more complex control tasks than using STATCOM and SSSC independently. 2.1. UPFC Mathematical Model To describe UPFC more precisely, the equivalent scheme shown in Fig. 2.a can be observed. Fig. 2 a – UPFC equivalent scheme, b – phasor diagram Variables Uk and Uk+1 represent complex voltages on busbars k and k+1, respectively. Complex voltage Use denotes series voltage inserted into the power line through the series power transformer. Complex voltage Ush is generated using shunt transformer. Modified voltage phasor on sending end U’k represents vector sum of voltages Uk and Use. Impedance Zsh describes shunt impedance of UPFC while ZT is transmission power line series impedance. Line current I flows through series transformer and current Ish flows through shunt part of UPFC, supplying the DC link with appropriate energy. In order to see how UPFC generated voltages Use and Ush influence on power system operation, apparent power on sending end can be observed (1). 𝑆𝑘 = 𝑈𝑘 ′ 𝐼∗ = 𝑈𝑘 ′ ( 𝑈𝑘 ′ − 𝑈𝑘+1 𝑍𝑇 ) ∗ (1) According to the phasor diagram (Fig. 2b), voltages can be expressed using their effective values and phases (2). 𝑈𝑘 = 𝑈𝑘𝑒 𝑗𝛿𝑘, 𝑈𝑘+1 = 𝑈𝑘+1𝑒 𝑗𝛿𝑘+1, 𝑈𝑠𝑒 = 𝑈𝑠𝑒𝑒 𝑗𝛿𝑠𝑒 (2) Substituting (2) into (1), using previously explained condition Uk ’ = Uke jδk+1 + Usee jδse equation (1) becomes (3). 𝑆𝑘 = 𝑈𝑘 ′2 𝑅𝑇−𝑗𝑋𝑇 − 𝑈𝑘𝑈𝑘+1𝑒 𝑗(𝛿𝑘−𝛿𝑘+1)+𝑈𝑘+1𝑈𝑠𝑒𝑒 𝑗(𝛿𝑠𝑒−𝛿𝑘+1) 𝑅𝑇−𝑗𝑋𝑇 (3) Real and imaginary part of (3) are given with (4) and (5), respectively. For simplicity, resistance R is neglected because the ratio X/R for high voltage power lines is Control of Series Impadance of Power Lines Using Power Flow Controller 425 approximately 1/11 for 400[kV] power lines. Further, the appropriate phases are expressed as δ = δk – δk+1, δ’ = δse – δk+1. 𝑃 = 𝑈𝑘𝑈𝑘+1 𝑋𝑇 sin(𝛿) + 𝑈𝑠𝑒𝑈𝑘+1 𝑋𝑇 sin(𝛿′) = 𝑓(𝑈𝑠𝑒,𝛿𝑠𝑒) (4) 𝑄 = 𝑈𝑘 ′2 𝑋𝑇 − 𝑈𝑘𝑈𝑘+1 𝑋𝑇 cos(𝛿) − 𝑈𝑠𝑒𝑈𝑘+1 𝑋𝑇 cos(𝛿′) = 𝑓(𝑈𝑠𝑒,𝛿𝑠𝑒) (5) Equations (4) and (5) represent active and reactive powers on sending end, respectively. It can be noted that these equations are function of effective value of series voltage Use, and its phase δse. Active power P can be dominantly controlled by generating appropriate phase δse while reactive power Q is controlled by generating adequate series voltage amplitude. The importance of UPFC lies in fact that effective value of series voltage Use can be changed from zero to its maximal value Use,m and the series voltage phase δse can be changed from 0 to 2π. This is possible only because two power controllers share the same DC link. In power control mode of operation, shunt part of UPFC is used for delivering the energy for series part. Active power exchanged between two converters is denoted as Pex. It should be pointed out that reactive power cannot be transferred through the DC link. So, every converter has to generate or absorb the reactive power locally. Shunt part is also used for keeping the k bus voltage amplitude at desired level, which is done by absorbing or injecting reactive energy. Additionally, this part of UPFC is used for controlling the DC link voltage by controlling exchanged active power Pex. Apparent power generated or absorbed by shunt part Ssh can be expressed by (6). 𝑆𝑠ℎ = 𝑈𝑘𝐼𝑠ℎ ∗ = 𝑈𝑘 ( 𝑈𝑘−𝑈𝑠ℎ 𝑍𝑠ℎ ) ∗ (6) Real part of (6) represents the shunt active power Psh and imaginary part is shunt reactive power Qsh. Model of DC link can be described by (7). 𝑃𝑒𝑥 = 𝑃𝑠ℎ − 𝑃𝑠𝑒 = 𝑖𝐶𝑢𝐷𝐶 = 𝑢𝐷𝐶𝐶 𝑑𝑢𝐷𝐶 𝑑𝑡 (7) In (7) Pse represents active power generated by series part of UPFC, ic is current flowing through the DC link capacitor, udc is DC link voltage and C represents capacitor capacitance. Traditionally, control of UPFC is done by generating appropriate series Use and shunt Ush voltages. These voltages are generated by the control system (Fig 1.), which goal is to regulate active and reactive powers as well as nominal voltage on k-th busbar. 3. PROPOSED CONTROL SCHEME The main idea for control system is to use desired values of line resistance and reactance as reference signals. These signals are further to be used to calculate appropriate references for active and reactive powers. To accomplish this idea, the control system of the series part of UPFC should be modified, while the control system of the shunt part of UPFC can be kept the same relative to the standard control systems of UPFC used in power flow control mode of operation. 426 A. A. MARKOVIĆ, S. VUKOSAVIĆ 3.1. UPFC Series Part Control Scheme Unlike previously described classical control schemes, UPFC can also be used in impedance control operation mode. To formulate the control low, the equivalent scheme shown in Fig. 3 can be observed. Fig. 3 UPFC equivalent scheme for impedance control operation mode In this case, series part of converter can be observed as variable impedance Z, unlike the classical study where the series part is represented by voltage source (Fig. 2a). Line current I should remain the same, independently of equivalent scheme (Fig. 2a or Fig. 3). Line current form Fig. 3 can be expressed by (8). 𝐼 = 𝑈𝑘+𝑈𝑠𝑒−𝑈𝑘+1 𝑍𝐿 (8) In this case, voltage vector Use can be varied, while ZT is constant. Line current calculated using equivalent scheme from Fig. 3 is given by (9). 𝐼 = 𝑈𝑘 − 𝑈𝑘+1 𝑍𝑒 (9) In case of (9), Ze is equivalent line impedance, expressed as sum of variable part of impedance Z and fixed impedance ZT. These currents, expressed by (8) and (9), should be equal. From this equality, the expression for variable part of impedance can be easily obtained (10). 𝑍 = − 𝑈𝑠𝑒 𝐼 (10) Variable impedance Z is expressed using series injection voltage 𝑈𝑠𝑒 and line current I, which can be measured in a real power system. Apparent power on power line, according the Fig. 3, is expressed by (11). 𝑆𝑘,𝑟𝑒𝑓 = 𝑈𝑘 ( 𝑈𝑘 − 𝑈𝑘+1 𝑍𝑒,𝑟𝑒𝑓 ) ∗ = 𝑃𝑟𝑒𝑓 + 𝑗𝑄𝑟𝑒𝑓 (11) Equation (11) shows that referent values for active and reactive power Pref and Qref, respectively, can be expressed indirectly by assigning referent values for equivalent impedance Ze. Calculated power references Pref and Qref are to be compared with measured Control of Series Impadance of Power Lines Using Power Flow Controller 427 active and reactive powers given by (4) and (5). Active power signal error represents input for PI controller (PI1, Fig. 4.a), which output is imaginary part Useq of complex voltage vector Use. Reactive power signal error feeds another PI controller (PI2, Fig. 4.a), which output represent the real part Used of complex voltage vector Use. Control scheme of series part of UPFC is shown in Fig. 4.a. Fig. 4 a. UPFC series part control scheme, b. UPFC shunt part control scheme 3.2. UPFC Shunt Part Control Scheme For proposed control scheme, based on impedance control, shunt part can be controlled classically. That means, shunt part complex voltage is generated using two PI controllers. The complete control scheme of shunt part of UPFC is shown in Fig. 4.b. The first PI regulator (PI3, Fig. 4.b) is used to generate the real part Ushd of complex voltage Ush. This regulator is fed by error signal which is generated as difference between reference DC link voltage uDC,ref and measured DC link voltage uDC, which is obtained using (7). Imaginary part Ushq of complex voltage vector Ush is generated using PI controller (PI4, Fig. 4.b), which input signal is difference between referent (usually nominal) voltage on bus k Uk,ref and measured voltage Uk. Controllers used in control schemes (Fig. 4) are discrete type PI controllers in positional form with anti-windup mechanism (Fig. 5). Fig. 5 Discrete type PI controller with anti-windup mechanism In Fig. 6 signals F and Y represent input and output signals, respectively. Parameters Kp and Ki are proportional and integral gains, respectively, while parameter Kc is calculated as ratio Ki/Kp. Sampling time is denoted as T. All control parameters are given in Appendix A. 428 A. A. MARKOVIĆ, S. VUKOSAVIĆ 4. TEST SYSTEM MODEL Operation of UPFC in impedance control mode is tested by means of computer simulation, on a simple power system, showed in Fig. 6. The system is classical single – machine infinite bus system with parallel lines. This type of system is widely used for demonstration of UPFC performance by means of power regulation and active power oscillation suppression [20 – 23]. Fig. 6 Test System Model Model of the test power system (Fig. 6) consists of four buses. Buses 1 and 4 are generator buses whereby the bus 1 is slack bus. Buses 1 and 2 are connected by means of power lines having impedances ZT1 and ZT4, respectively. Buses 2 and 3 are connected by means of parallel lines with impedances ZT2 and ZT3. Constant impedance loads are connected to buses 2, 3 and 4, and their impedances are denoted as ZL1, ZL2 and ZL3, respectively. Unified power flow controller is connected to the bus 2, in series with power line which impedance is ZT2. Thus, UPFC will be used for control of impedance on this power line and simultaneously for controlling bus 2 voltage amplitude. Power generator G1 (Fig. 6) is slack generator, so it is modeled as constant voltage source with nominal voltage. Detailed model of generator G2 is given in [24]. It consists of models of electrical and mechanical subsystems suitable for observation of transient and steady state periods. Excitation system of this generator is modeled as standard Type 1 IEEE excitation system. System frequency controller is integral type controller, while turbine controller is modeled as widely used first order system with droop characteristics. Power lines are described by their series impedances, where the shunt parts of the power lines are neglected. All loads are modeled as constant impedance loads. Parameters of the test system model are given in Appendix B and they are represented in per unit system with respect to base power 100[MVA] and base voltage 220[kV]. 5. SIMULATION RESULTS In order to explore the possibility of UPFC to control series line impedance, computer simulation is created in MATLAB, Simulnik. Simulation is prepared according to the test system model (Fig. 6) and UPFC mathematical model, described in Section III. The simulation is divided into nine time segments (T1 – T9), and each of them lasts for 5[s]. The first time interval T1 starts at the time t1 = 10[s] and lasts until the time t2 = 15[s], and the last one T9 starts at the time t8 = 50[s] and lasts until the end of the simulation, Control of Series Impadance of Power Lines Using Power Flow Controller 429 which is 55[s]. All time intervals are shown in Fig. 7. The simulation results are observed form the time t1 = 10[s] in order to get clearer results and to skip the transient period. The aim of this simulation is to show the possibility of UPFC to independently regulate line resistance and reactance. In order to investigate the great majority of all possible outcomes, different references of X and R are generated in every time interval. These are represented by step changes. The step responses of measured resistance (black) and reactance (blue) of line 2 are given in Fig.7. Dashed traces in Fig. 7 represent nominal line parameters, when no compensation is done, that is Re,ref=RT2=0.03[p.u] and Xe,ref=XT2=0.2[p.u]. Fig. 7 Step change of equivalent line impedance The goal is to generate higher and lower values of resistance and reactance compared to uncompensated line parameters, to investigate if UPFC is capable to independently compensate both line parameters. Step responses of X and R represented in Fig. 7 show that measured equivalent resistance and reactance follow the reference signals without steady sate error. The step responses are almost aperiodic. When the reference of one of the parameters (X or R) is changed while the other parameter is kept constant, undershoot or overshoot occur in response of the parameter which is kept constant. This can be observed in transition from time period T3 to T4, when R=0.05[p.u] and it is kept constant and greater than nominal (uncompensated) and X=0.15[p.u] which is lower than nominal. In this case the disturbance in measured resistance occurs and it is represented as an overshoot. However, this disturbance is evidently negligible, and it happens due to the so- called coupling between active and reactive powers. Similar disturbances can be seen on the transition from time period T2 to T3 when the overshoot occurs in time response of measured reactance whereas in the transition from time period T6 to T7. The summarized results of the simulation for Fig. 7 are given in Table 1. In the Table 1 the brief description of time periods T1 to T9 is given using symbols describing direction of change of X and R relative to previous time period. Symbol “-“ which means no change in X or R, “↘” lower X or R and “↗” higher X or R. 430 A. A. MARKOVIĆ, S. VUKOSAVIĆ Table 1 Summarized results of step responses of equivalent line X and R T1 T2 T3 T4 T5 T6 T7 T8 T9 X R X R X R X R X R X R X R X R X R D IR . − • • • • • • • • ↘ • • • • • ↗ • • • • • S T E P AP.1 • • • • • • • • • • • • OVER.2 • • • UNDER.3 • • 1Aperiodic 2Overshoot 3Undershoot The brief overview of the step response of equivalent X and R are described by the type of step response which can be aperiodic, with overshoot or with undershoot. The results in Table 1 show also that the time response is mostly aperiodic. Time responses of the variable resistance (blue) and reactance (red) are shown in Fig. 8. When no compensation is done (time periods T1 and T8), variable R and X are zero, which is in accordance with the theoretical discussion. The step responses are the same as the step responses of equivalent X and R (Fig. 7) since they represent the sum of these signals with constant, uncompensated values of X and R. In is interesting to notice that variable X and R, generated by the UPFC can be both positive and negative. Especially interesting is the possibility of generating negative resistance. Fig. 8 Step change of variable reactance and resistance The change of line resistance and reactance influences the change of active (red trace) and reactive (blue trace) powers in line 2, shown in Fig. 9. Dashed trances in Fig. 9 represent active and reactive powers when no compensation is done. Step responses of active and reactive powers are almost aperiodic. The overshoot in active power step response happens in transition from the time period T3 to T4 (1.2%) and in transition from the time period T5 to T6 (2.9%). However, these overshoots are under 5% which is Control of Series Impadance of Power Lines Using Power Flow Controller 431 considered acceptable. It is important to notice that no oscillations in active power response are present. Comparing the results in Fig. 7 with the results obtained in Fig. 9, it can be concluded that the step change in line reactance has greatest impact to power changes, which is in accordance with the theoretical discussion. Fig. 9 Active and reactive power change To deeply investigate the step response of equivalent line resistance (black trace), Fig. 10 can be observed. The trances shown in Fig. 10 are the same as the trances form Fig. 7, only enlarged. Fig. 10 The step response of equivalent Line Resistance Step responses of equivalent resistance are mostly aperiodic as it is previously stated. Step response is quite fast end it reaches the steady state for 4[s]. The enlarged parts in Fig. 432 A. A. MARKOVIĆ, S. VUKOSAVIĆ 10 show the exact time responses of equivalent resistance in transition from time period T6 to T7 when the overshoot of 4% occurs, and in transition from time period T8 to T9 when the overshoot of 3% occurs. These are acceptable values. However, greater disturbances evidently occur in transition from T3 to T4, T4 to T5 and T6 to T7. These disturbances can be lowered by designing an appropriate decoupling controller. Further, the time responses of UPFC and bus 2 voltages are observed (Fig. 11). The main purpose of the UPFC is to insert series voltage into the line to in order to generate the reference equivalent resistance and reactance. Step responses of the d (red trace) and q (blue trance) components of the UPFC series voltages are shown in Fig. 11a. When no compensation is done (time periods T1 and T8), series voltage is equal to zero, which means that series part of UPFC is inactive. In other time periods series voltage changes in appropriate manner to fit the regulation goals. Time responses are obviously aperiodic with Fig. 11 a. UPFC series voltage, b. UPFC shunt voltage, c. Bus 2 voltage amplitude, d. DC link voltage Control of Series Impadance of Power Lines Using Power Flow Controller 433 very fast response, with time constant below 1[s]. The amplitude of series injected voltage is within the rage of 0.1[p.u], which is the typical maximal value of inserted series voltage in practical implementation [18]. The main task of UPFC shunt part is to keep bus 2 and DC link voltages at nominal level. Fig. 11c and Fig. 11d show that this task is successfully accomplished since observed voltages are kept constant during all time periods and no disturbances are noted. The reason for this is UPFC shunt voltage which d (red trace) and q (blue trance) components are shown in Fig. 11b, which is also kept constant during all time periods thanks to the shunt part control system. 6. CONCLUSION The paper discusses the possibility of aiding to the integrity of ac grids by introducing unified power flow controller (UPFC), enabled by the proposed controller, capable of modulating both series resistance R and series reactance X of an overhead power line. Proposed controller is simple to set and straightforward to use. The proposed operation mode of UFPC is tested on single – machine infinite bus system consisting of four buses with detailly modeled generator. The results show that UPFC is very efficient in compensating line equivalent resistance and reactance. The step responses are aperiodic with zero steady state error and small settling time. Decoupling controllers are not required as the disturbances that take place during step changes of reference signals are quite insignificant. This way, active and reactive powers on the line are controlled indirectly, by changing the line impedance. No oscillations in active power step response are noted. The described possibility of UPFC has the potential of being used for attenuation of power angle deviations and power oscillations in large scale power systems experiencing significant power disturbances. However, this possibility is yet to be proven. 7. APPENDIX A Parameters of four used PI regulators, numbered as in Fig. 4 are: Kp1=0.1, Ki1=1, Kc1=10; Kp2=0.1, Ki2=1.4, Kc2=14; Kp3=2, Ki3=10, Kc3=5; Kp4=5, Ki4=10, Kc4=2. 8. APPENDIX B Parameters of the test power system are as follows: ▪ Generator G2: Xd=1.2[p.u], X'd=0.3[p.u], Xq=1[p.u], T'd0=5[s], H=6[s], K=0.02; ▪ Generator's G2 voltage regulator: Ka=20, Ta=0.2[s]; ▪ Generator's G2 turbine: TCH=0.4[s]; ▪ Turbine's regulator: TSV=0.2[s]; ▪ System frequency regulator: Tf=1[s]; ▪ Power lines: ZV1=0.01+j0.1[p.u], ZV2=0.03+j0.2[p.u], ZV3=0.03+j0.4[p.u], ZV4=0.01+j0.2[p.u]; ▪ Loads: ZL1=2+j1[p.u], ZL2=0.8+j0.6[p.u], ZL3=0.8+j0.6[p.u]; ▪ UPFC parameters: Zsh=0.001+j0.08[p.u], C=0.5[p.u]. 434 A. A. MARKOVIĆ, S. VUKOSAVIĆ REFERENCES [1] L. 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