FACTA UNIVERSITATIS Series: Electronics and Energetics Vol. 34, No 3, September 2021, pp. 445-460 https://doi.org/10.2298/FUEE2103445S © 2021 by University of Niš, Serbia | Creative Commons License: CC BY-NC-ND Original scientific paper INTRODUCING AN OPTIMAL QCA CROSSBAR SWITCH FOR BASELINE NETWORK Reza Sabbaghi-Nadooshan Department of Electrical Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran Abstract. Crossbar switch is the basic component in multi-stage interconnection networks. Therefore, this study was conducted to investigate performance of a crossbar switch with two multiplexers. The presented crossbar switch was simulated using quantum-dot cellular automata (QCA) technology and QCA Designer software, and was studied and optimized in terms of cell number, occupied area, number of clocks, and energy consumption. Using the provided crossbar switch, the baseline network was designed to be optimal in terms of cell number and occupied area. Also, the number of input states was investigated and simulated to verify accuracy of the baseline network. The proposed crossbar switch uses 62 QCA cells and the occupied area by the switch is equal to 0.06µm2 and its latency equals 4 clock zones, which is more efficient than the other designs. In this paper, using the presented crossbar switch, the baseline network was designed with 1713 cells, and occupied area of 2.89µm2. Key words: QCA, Crossbar switch, MUX, Baseline Network, Multi-stage interconnection networks, Energy dissipation 1. INTRODUCTION Today, density of devices, power consumption, and speed of response are among challenges of designing electronic circuits. Sizes of semiconductor devices have reached sub microns, increasing level of complexity in design of chips. According to Moore's Law, the number of transistors in a chip doubles every 18 months, meaning an increase in circuit density and power consumption in the chips [1]. The increase in density of the circuits means shrinking of the transistors inside the chips, and this shrinkage in complementary metal-oxide- semiconductor (CMOS) technology increases leakage current and creates a short channel effect [2]. Received January 11, 2021; received in revised form March 6, 2021 Corresponding author: Reza Sabbaghi-Nadooshan Niayesh Building, Emam hasan Blvd., Pounak, Tehran, Iran E-mail: r_sabbaghi@iauctb.ac.ir 446 R. SABBAGHI-NADOOSHAN Problems in downsizing CMOS technology have led to introduction of new emerging technologies, such as Fin field-effect transistor (FinFET), carbon nanotube field-effect transistor (CNTFET), and quantum-dot cellular automata (QCA), among which QCA technology can be the best alternative to CMOS in designing of digital circuit [3-5]. QCA cells are quantum cells that in binary state consist of four quantum wells and two electrons forming stable states of electrons for polarization in QCA [6-8]. In QCA cells, transfer of current from one cell to another is zero because electrons can only tunnel inside each cell, and information can only be transmitted through transfer of state from one cell to another. This technology has the least energy consumption due to the lack of current transfer between cells. The advantages of QCA technology include high response speed, low occupied area, and low energy consumption, which will make this technology a leader in designing the future digital circuits [9]. Among the circuits designed using QCA, one can mention to design of adder circuits [10], serial-parallel converter [11], counter [12], serial- in to serial-out (SISO) shift register [13], multiplier [14], and comparator circuit [15]. Another advantage of using QCA is design of complex digital systems. Parallel communication systems, multiprocessors, and design of network communication systems within chips can be mentioned as examples of complex digital systems [16-17]. In multiprocessor systems, communication between processors is required from input to output; this connection can be established through nodes in the network [18-20]. Using control lines in each switch used in each node, path of data transfer from the desired input to output is specified. Interconnection networks that can be implemented using QCA technology include butterfly, dragonfly, beyond network, etc. In this study, an optimal crossbar switch is presented considering occupied area, the number of cells, and the amount of latency in the switch. Then, interconnection structure of the baseline network will be presented using the proposed crossbar switch. In rest of the paper, section 2 describes the QCA. The proposed crossbar switch and baseline network will be presented in section 3 and section 4. Finally, section 5, concludes the paper. 2. QCA The QCA cell was first proposed by Lent [21] and was developed in 1997 [22]. Each QCA cell contains four potential wells and two electrons enclosed in a square [23-25]. Two electrons inside each square can freely tunnel between the quantum-dots in each cell, but electrons cannot leave the enclosed square and tunnel from one cell to another. Data transfer in QCA cells from one cell to another is done through external electrostatic energy and in fact, information is not transmitted through current. Two stable states are formed based on placement of electrons in each QCA cell creating -1 and +1 polarizations in the QCA (steady state occurs in QCA cells at the greatest distance between the electrons in each cell) [26-31]. Fig. 1 depicts structure of the QCA cell. Optimal QCA Crossbar Switch for Baseline Network 447 Fig. 1 QCA cell structure The QCA uses clocks to control tunneling and data synchronization. The clock in QCA has four phases: switch, hold, release, and relax [19, 25, 27]. Fig. 2 illustrates phase clock in the QCA. Fig. 2 Phase clock in QCA In the switch phase, the potential of barrier slowly increases, and kinetic energy of the electrons decreases. After the switch phase, the cell will enter the hold phase, in which the barrier potential reaches the highest level and kinetic energy in this phase is almost zero. After the hold phase, the release phase occurs, in which the potential of barrier slowly begins to decrease, electrons are slowly released, and kinetic energy begins to increase. The next phase is the relax phase. In this phase, the potential level reaches its lowest point and electrons can tunnel freely inside the cell [19, 25, 27]. As mentioned, the QCA cell has two polarizations of -1 and 1, which can be attributed to logic levels of 0 and 1, respectively, and basic gates of binary logic can be implemented by these polarizations in QCA [6-8]. Fig. 3 shows the basic gates in QCA. Fig. 3 Basic gates in QCA 448 R. SABBAGHI-NADOOSHAN 3. PROPOSED CROSSBAR SWITCH In this section, at first, crossbar switch is designed and implemented and then, application of switch crossbar will be reviewed in the baseline network. In this study, QCA Designer software version 2.0.3 was used to simulate circuit and QCAPro software was used to calculate energy consumption. The parameters used in QCA Designer software are as follows: Number of samples: 50000 Convergence Tolerance: 0.001000 Radius of Effect (nm): 65 Relative permittivity: 12.9 Clock High: 9.8 e-22 Clock Low: 3.8 e-23 Clock Shift: 0 Clock Amplitude Factor: 2.000000 Layer Separation: 11.500000 Maximum Literation’s Per Sample: 100 3.1. Crossbar switch A crossbar switch is a digital system connecting an input to an output using a control line with respect to a pattern. This pattern is created using the control line, for example, if the control line is equal to 0, the Input 1 information is transferred to Output 1 and Input 2 to Output 2, or if the control line is equal to 1, Input1 is transferred to Output 2 and Input 2 to Output 1 as shown in Fig. 4. Using the crossbar switch, the connection between nodes can be created crosswise, and the control line is used to create a connection between the nodes in the form of a bar and cross. Fig. 4 shows the two states of bar and cross configured using the control line. Fig. 4 Crossbar switch configuration Table 1 shows truth table of a crossbar switch, which can be simplified by Karnaugh map to provide a relationship between input and output of a crossbar switch. Eqs. 5 and 6 are related to crossbar switches, and each of the outputs OP0 and OP1 shows a 2:1 multiplexer relationship, and each multiplexer (MUX) is controlled across the control line. Optimal QCA Crossbar Switch for Baseline Network 449 Table 1 Truth table for crossbar switch Control line IP1 IP0 OP1 OP0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 1 0 0 0 0 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 . .= +OP IP C IP C (1) 1 0 1 . .= +OP IP C IP C (2) Fig. 4 shows the states created in data transfer in a crossbar switch, which uses Eqs. 1 and 2 to design such a switch. These two equations indicate the existence of two multiplexers in the crossbar switch, which can be used to create states in the crossbar switch using the control line. Fig. 5 shows wiring of a crossbar switch by two multiplexers, using Eqs. 1 and 2. Fig. 5 Crossbar switch using two multiplexers Fig. 6 shows the MUX circuit used in this study. Fig. 7 shows simulation results of the MUX. In the used MUX, if C=0, the output will be equal to IP1 and if C=1, the output will be equal to IP0. Fig. 6 MUX circuit 450 R. SABBAGHI-NADOOSHAN Fig. 7 MUX simulation result In the following, design of the crossbar switch using QCA is presented. Fig. 8 shows implementation of the crossbar switch using QCA technology, and Fig. 9 illustrates the simulation results for the crossbar switch. In Table 2, the values obtained from measuring number of cells, occupied area, and latency in the proposed crossbar switch are compared with those reported by the other previous works. Fig. 8 Crossbar switch with QCA Optimal QCA Crossbar Switch for Baseline Network 451 Fig. 9 Result simulation for crossbar switch Fig. 9 illustrates transfer of input to output, where for C=0 the IP0 and IP1 data are transferred to OP0 and OP1, respectively (shown with a red square in Fig. 9). For C=1, IP0 data are transferred to OP1 and IP1 data are transferred to OP0, as shown in Fig. 9 with a blue square. Table 2 Compare crossbar switch with other work Structure Parameters Cell count Total Area (µm2) Latency (Clock zone) crossbar switch [18] 101 0.096 8 crossbar switch [19] 157 0.25 6 crossbar switch [20] 123 0.137 8 crossbar switch [36] 81 0.08 4 crossbar switch this work 62 0.06 4 According to Table 2, the proposed crossbar switch has an optimized design in terms of cell number, occupied area, and latency. In the circuit designed in this study, 62 cells were used with an occupied area of 0.06µm2 and latency equal to 4 zone clocks or one clock pulse . 3.2. Energy dissipation on crossbar switch In this section, energy in the proposed crossbar switch designed using QCA cell will be investigated. In calculation of the consumed energy, the Hamiltonian matrix is needed, which is obtained using the Hartree-Fock approximation. Eq. 7 shows the Hamiltonian 452 R. SABBAGHI-NADOOSHAN matrix in QCA [32, 33]. In Eq. 3, P is the polarization value in binary QCA that is equal to 1 or -1; Ek is the kinetic energy, and j is the tunneling energy in QCA. H(j) = 2 2   − −      −    k j k j E P j E j P   (3) Energy value of the QCA cell can be measured by calculating the Hamiltonian matrix and quantum measurement in the QCA. Herein, the amount of dissipated energy was calculated using QCA Pro software. Energy dissipation was calculated for the values of 0.5Ek, 1 Ek and 1.5 Ek, as shown in Table 3. Fig.10 depicts thermal layout of crossbar switch circuit for energy dissipation. (a) (b) (c) Fig. 10 Thermal Layout for average energy dissipated in Crossbar switch circuit. a) Thermal Layout for 0.5Ek. (b) Thermal Layout for 1Ek. (c) Thermal Layout for 1.5Ek Table 3 Energy dissipation for Crossbar switch circuit γ/EK 0.5 1 1.5 Avg Ediss (meV) 109.19 133.85 166.17 Max Ediss (meV) 219.46 227.44 244.82 Min Ediss (meV) 17.14 55.24 100.20 Optimal QCA Crossbar Switch for Baseline Network 453 4. BASELINE NETWORK In the previous section, a crossbar switch was simulated using two multiplexers and was studied in terms of cell number, occupied area, latency, and consumed energy. Now, the baseline network is simulated using the proposed crossbar switch, and the proposed baseline network is investigated for several selected states. Baseline network is one of various types of multistage interconnection networks (MINs) and a subset of delta network, consisting of several layers, and each layer includes several 2×2 switches [34, 35]. Each baseline network consists of 2q rows and q+1 set, and each node contains a 2×2 switch. The baseline network is presented in the form of 2×8, which has eight inputs and eight outputs, as designed using a crossbar switch. Fig. 11 shows the building block of baseline network. Fig. 11 Baseline network diagram 4.1. Implementation of Baseline Network by QCA The aim of the present study was presenting and implementing a baseline network optimally in terms of the number of cells and occupied area, simulating the target baseline network using QCA technology and QCA Designer software. In this simulation, the proposed baseline network has eight inputs, eight outputs, and 12 crossbar switches. Fig. 12 illustrates the designed baseline network by QCA technology. In the simulated baseline network, 1713 QCA cells were used, the occupied area by the baseline network was equal to 2.89µm2 and the latency was equal to 5 clocks or 20 clock zones. Table 4 presents the parameterized results in the baseline network and compares the results. Table 4 Baseline network comparison results Structure Parameters Cell count Total Area (µm2) Latency (Clock zone) Baseline network [19] 2491 3.85 18 Baseline network with this work 1713 2.89 20 454 R. SABBAGHI-NADOOSHAN Fig. 12 Designed baseline network with QCA 4.2. Simulation scenarios In simulation of the baseline network, eight input lines and 12 control lines were used. A large number of inputs and control lines cause the displayed waveform to be distorted, for this reason, vector table setup of the QCA Designer software was used to display the waveforms. In this regard, vector table setup forms were used to display inputs and control lines. In the first scenario, all the control inputs are equal to 0. The simulation results are shown in Fig. 13, in which the input data have been transported in the output. Table 5 shows the input-to-output transmissions done by control lines. Fig. 13 illustrates latency of the baseline network with the purple box. Latency was equal to 5 clock pulses as shown in Fig. 13. The baseline network outputs are shown with the red box. Table 5 State of input to output transport in the first scenario INPUT OUTPUT I0 OP0 I1 OP4 I2 OP2 I3 OP6 I4 OP1 I5 OP5 I6 OP3 I7 OP7 Optimal QCA Crossbar Switch for Baseline Network 455 Fig. 13 Output result for input state of first scenario According to Fig. 13 and Table 5, for all control lines to be zero, information I0 to OP0, I1 to OP4, I2 to OP2, I3 to OP6, I4 to OP1, I5 to OP5, I6 to OP3, I7 will be transferred to OP7. In the second scenario, all control inputs are 1 and the results are shown in Fig. 14. Table 6 shows the input-to-output transmissions. 456 R. SABBAGHI-NADOOSHAN Fig. 14 Output result for input state of second scenario Table 6 State of input to output transport in the second scanrio INPUT OUTPUT I0 OP7 I1 OP3 I2 OP5 I3 OP1 I4 OP6 I5 OP2 I6 OP4 I7 OP0 Optimal QCA Crossbar Switch for Baseline Network 457 According to Fig. 14 and Table 6, for all control lines to be 1, information I0 to OP7, I1 to OP3, I2 to OP5, I3 to OP1, I4 to OP6, I5 to OP2, I6 to OP4, I7 will be transferred to OP0. Fig. 15 Output result for input state of third scenario In the third scenario, control input C31 and C32 are 1 and other control lines are 0 and simulation results are shown in Fig. 15. Table 7 depicts the input-to-output transmissions that are done by control lines. Fig. 15 illustrates the latency of the baseline network and the outputs of baseline network. In the simulation results of Fig. 15, the latency is equal to 5 clock pulses. 458 R. SABBAGHI-NADOOSHAN Table 7 State of input to output transport in the third scenario INPUT OUTPUT I0 OP1 I1 OP4 I2 OP3 I3 OP6 I4 OP0 I5 OP5 I6 OP2 I7 OP7 According to Figs. 15 and Table 7, control lines C31 and C32 are 1 and other control lines are 0, and information will be transferred as Table 7. 5. CONCLUSION In this paper, an optimized crossbar switch was studied in terms of cell number, occupied area, number of clocks, and energy consumption. The switch uses 62 QCA cells and the occupied area by the switch is equal to 0.06µm2 and latency is equal to 4 clock zones, which is more efficient than the other designs presented in the literature. In the provided switch, the amount of consumed energy for 0.5Ek, 1Ek, and 1.5Ek was calculated by QCA Pro software. Then, the baseline network was designed with 1713 cells and occupied area of 2.89µm2 using the presented crossbar switch. For validating data transfer in the simulated baseline network, three scenarios were considered. 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