id	author	title	date	pages	extension	mime	words	sentence	flesch	summary	cache	txt
fuelectenerg-6162	Dash, Sandeep Kumar; Mishra, Satya Narayan; Rout, Nirmal Kumar	DESIGN OF EFFICIENT DELAY BLOCK FOR LOW FREQUENCY APPLICATION	2020	10	.pdf	application/pdf	3723	201	66	The total non-overlapping clock period is given by N × τp, where „N‟ represents the number of CICSI delay block and „τp‟ represents the average propagation delay of single CICSI delay block. The ring oscillator using 101 stages of delay block is designed and it is shown that it operates at a frequency of 17MHz with a power consumption of 420µW. Key words: CMOS inverter, Inverted current starved inverter, NOC 1.	cache/fuelectenerg-6162.pdf	txt/fuelectenerg-6162.txt