id	author	title	date	pages	extension	mime	words	sentence	flesch	summary	cache	txt
fcis-4087	Chen, Wei	Design and implementation of Pedestrian detection based on Zynq APSoc	2022	3	.pdf	application/pdf	1729	94	54	The input and output channels and hardware algorithm modules of video data are set up. As shown in the figure below, we see that VDMA has an AXI4 Memory Map interface for reading and writing video data to memory, an AXI4-Lite interface for reading VDMA status and configuring VDMA parameters, and an AXI4-Stream interface, For video input and output.	cache/fcis-4087.pdf	txt/fcis-4087.txt