Frontiers in Computing and Intelligent Systems ISSN: 2832-6024 | Vol. 11, No. 3, 2025 155 Research on the Suppression of Secondary Power Ripple in Single‐Phase Pulse Rectifier Based on Improved Deadbeat‐Repetitive Control Jinkai Ai, Kewei Zhang * and Zhenkui Dong Department of Electrical Engineering, Dalian Jiaotong University, Dalian, Liaoning, China * Corresponding author: Kewei Zhang (Email: 1167416@qq.com) Abstract: In order to solve the problems of increasing the conduction loss of power devices and decreasing the conversion efficiency caused by the secondary power ripple of the single-phase pulse rectifier of high-speed trains, a buck chopper active power decoupling loop is proposed to replace the LC filter loop, which absorbs the secondary pulsation power by increasing the pulsation of the energy storage capacitor and reduces the capacity of the energy storage capacitor to improve the power density of the system. It integrates and improved deadbeat-repetitive control without difference, improves the inherent cycle delay problem of repeated control, realizes the tracking of the second harmonic current without difference, and improves the dynamic performance of the system. Through the MATLAB/Simulink simulation platform, a simulation model of Buck chopper active power decoupling of single-phase pulse rectifier is established, and the harmonic content and load mutation response time are compared and analyzed, and the simulation results prove the correctness and feasibility of the theoretical analysis. Keywords: Single-phase Pulse Rectifier; Secondary Power Ripple; Active Power Decoupling; Improved Deadbeat-Repetitive Control. 1. Introduction As a grid-side converter in the traction power supply link of trains, the single-phase pulse rectifier has the advantages of increasing the transmission power and improving the power factor, but there is a natural secondary pulsation on the grid side of the rectifier, which causes the power mismatch between the grid side and the DC side, which leads to the secondary power ripple of the DC bus voltage [1-3]. The power ripple on the DC side will increase the current stress of the rectifier power device, increase the conduction loss, which will affect the power quality of the traction power supply system, and even cause resonance accidents and equipment damage [4-10]. In order to reduce the secondary power ripple on the DC side, the traditional method is to connect a large-capacity electrolytic capacitor in parallel in the DC link to obtain the effect of buffering the ripple power, but this method has the disadvantages of large device size, short service life, and reducing the power density of the system. To this end, some scholars have proposed the use of active power decoupling technology [11-17], that is, actively controlling power semiconductor devices to replace electrolytic capacitors with film capacitors with longer life to compensate for secondary power ripples. However, the method has low control accuracy and requires large-capacity energy storage capacitors, and the Buck/Boost decoupling circuit is complex, so it is not suitable for high-power and low-switching frequency scenarios of high-speed trains. Ref. [19] uses proportional integral control to improve system accuracy, but its limited two-fold gain makes it difficult for the decoupled inductor current to track the second harmonic current reference. In Ref. [20], a dual- objective cost function is constructed by using dual-objective predictive control, which can simultaneously realize the tracking of the decoupling inductor current and the precise control of the decoupling capacitance. This method relies on sampling the input current on the DC side, which requires the current Hall or current transformer to be embedded and decoupled circuit, it is not conducive to the modularization of the system. In Ref. [21], the Buck chopper active power decoupling and repetitive control is adopted, and the Buck topology is used as a device with fewer applications, which effectively prevents the resonance problem with the original circuit, so it is more suitable for use in the high-speed train traction system. However, the high gain of repeated control of a specific frequency is obtained by the cycle delay, so the poor dynamic response is an inevitable defect of repeated control. In order to improve the dynamic performance of the decoupling circuit and suppress the power ripple on the DC side, this paper proposes a control method for the active power decoupling circuit of Buck chopper based on the improved deadbeat-repetition control, which combines the improved undifferentiated beat algorithm with repetitive control, and uses the undifferentiated beat algorithm to improve the dynamic performance of the system, so that the system can track the secondary pulsation power with high precision and quickly respond to the change of harmonic signal, and verify the feasibility of the control strategy by combining simulation. 2. Buck Chopper Active Power Decoupling Topology and Working Principle The topology of the single-phase pulse rectifier and Buck chopper active power decoupling topology circuit is shown in Figure 1, which is composed of the rectifier part, the decoupling part and the DC link, the rectifier part is a single- phase full-bridge inverter, which realizes the AC-DC conversion and is transmitted to the post-stage decoupling circuit, and the Buck chopper active power decoupling circuit realizes the purpose of power decoupling through the 156 secondary pulsation component in the energy storage capacitor absorption current, and continues to transmit to the subsequent DC link, which is composed of capacitive resistance and plays the role of buffering the steady voltage. us Ls Rs S1 S2 S3 S4 S5 S6 D1 D2 D4 D3 D5 D6 Lf Cs Cdc iac iSHCC + - Vbus RL Fig 1. buck chopper active power decoupling topology In a single-phase pulse rectifier, the grid-side port voltage and current can be expressed as: √2 sin (1) √2 sin (2) where Vac and Iac are the effective values of port voltage and current; ω is the angular frequency and θ is the phase difference between uac and iac. The instantaneous power of this AC port is: cos cos 2 (3) If the converter efficiency is 100%, the DC bus output current can be expressed as ′ (4) ′ (5) cos 2 (6) In the formula, Idcis the DC current output of the converter, i'dcis the output DC component, and iSHC is the second harmonic. In order to compensate for the iSHC at the output end of the converter, the Vbus is the bus capacitor voltage, and the input current of the decoupling circuit iSHCC is equal to iSHC. The following figure shows the main waveform diagram when the active power decoupling circuit is working, in which the voltage ripple of the decoupling circuit port is small, which can be regarded as a constant, Therefore, the average value of the voltage of the intermediate DC bus Vbus. Fig 2. Buck chopper decoupling circuit operating waveform As can be seen from Figure 2, during the [t0,t0+Tac/4] period, the input current iSHCC is greater than zero, the storage capacitor voltage VCS increases, and the active decoupling circuit works in charging mode, During the [t0+Tac/4,t0+Tac/2] period, the input current iSHCC is less than zero, the voltage of the energy storage capacitor is VCs reduced, and the active decoupling circuit works in discharge mode. Since the operating waveform is approximately sinusoidal, only one quarter period needs to be analyzed, and the energy ΔECs absorbed by the storage capacitor is in the case of iSHCC>0. ∆   (7) From equation (7), the T_ac is the alternating voltage period; S is the apparent power of the rectifier, which can also be expressed as follows according to the relationship between the capacitor energy storage and its voltage Δ E_Cs which can also be expressed as: ∆ ∆ (8) In equation (8), VCs-maxand VCs-minare the maximum and minimum values of the energy storage capacitor voltage, respectively, where VCs-ave is the average value of the energy storage capacitor voltage, and ΔVCs is the energy storage capacitor voltage ripple. equation (7) and equation (8) can be obtained: ⋅ ∆ (9) From equation (9), it can be seen that the capacity of the energy storage capacitor C_s can be reduced by increasing the pulsation Δ of the energy storage capacitor voltage V_Cs compared with passive LC filtering, the active power decoupling circuit can reduce the bus capacitance capacity, and the energy storage capacitor in the decoupling circuit can choose a film capacitor with a long life, so as to achieve the design purpose of improving the power density and prolonging the service life of the converter. 3. Basic Repetitive Control Principle As can be seen from the previous section, power decoupling can be achieved by tracking the second harmonic current on the DC side and controlling the energy storage capacitor pulsation. The repetitive control method is a typical application of the internal mode principle, by introducing a periodic delay in the forward channel and constructing positive feedback, and introducing a resonant peak at the input signal fundamental and its frequency doubling, it can achieve efficient suppression of any integer harmonic, so the use of repetitive control can make the decoupling circuit effectively track the second harmonic, the structure of traditional repetitive control, This is shown in Figure 3. P(z) Q(z)z-n z-n C(z)=Krz mS(z) i* SHCC + - + + + + d(z) iSHCCe(z) Inner mold generator Repeat control generators Fig 3. Traditional repetitive control block diagrams In Figure (3), i* SHCC is the pulsating current reference input, the error signal is e(z), and d(z) is the disturbance signal, and the recursive function from i* SHCC to iSHCC is: (10) where GRC (z) is the transfer function of the repeating controller, which can be obtained from the structure diagram: (11) 157 P(z) is the controlled object, Q(z) is usually a constant or low-pass filter slightly less than 1 in the delay link, N is the number of sampling points in a single cycle of complex control, T is the fundamental period of the reference signal, Ts is the sampling period of the discrete system, Kr is the compensation gain, the selection of Kr affects the stability of the system, the second-order low-pass filter S(z) is added to compensate the control object and the system fluctuation, and zm is the linear phase advance compensation link. However, when the frequency changes, due to the existence of the delay link z-N, the system generates a cyclic delay, and cannot respond quickly and accurately track the signal. 4. Improved Deadbeat-Repetitive Control Strategy In the operation of high-speed trains, the system working environment is complex, the input frequency of the rectifier is changeable, the delay link of repeated control will cause frequency deviation due to input fluctuations, and the compensation gain of the controller will be reduced at the resonant frequency, resulting in the repetitive controller can not respond quickly, but may interfere with the normal operation of the system. deadbeat-predictive control can realize the tracking of a given value, and its algorithm is simple and the dynamic response speed is fast, so the beat- free prediction is proposed to compensate for the delay caused by repeated control. When the decoupling circuit is working, the voltage of the capacitor Cs as the decoupling capacitor is Ucs. When Ucs is constant, it is assumed that Cs absorbs all of the two-fold power, i.e.: 2 (12) Then the capacitor voltage can be solved: 2 (13) From the above equation, the capacitance value is inversely proportional to the capacitance voltage, where m is the integration constant, because the buck chopper active power decoupling will work in the chopper circuit mode, so the bridge arm voltage does not exceed the DC bus voltage, in order to make the system have a higher power density, the capacitance value should be as small as possible. Therefore, the DC side voltage is equal to the sum of the capacitance and inductor voltage. (14) The forward difference method is used to discretize the above equation, the discretization period is Ts, and the discretized expression is (15) where iSHCC(k+1) represents the current sampling value at (k+1)Ts. Ideal beat-free control assumes that the generation of the control signal from AD sampling to the control signal is instantaneous at the kTs moment and does not consume time. For the actual digital control system, there is inevitably a digital delay in this process, so the traditional deadbeat- predictive control is generally realized in the way of lag one beat, that is, in the control signal calculated in the k-k control cycle ucs * (k+1) will play a role in the k+1 control cycle. The control delay diagram is shown below The kth control cycle The k+1st control cycle carrier wave Modulated waves U* cs(k)Duration of action U* cs(k+1)Duration of action Sampling time and cycle delay kTs (k+1)Ts (k+2)TsEnter a control signal U* cs(k) Fig 4. Traditional time-lap control time-lapse plot Based on the above analysis, it can be seen that only the current is controlled by the above formula, ignoring the one- beat delay of the system itself, that is, the actual lag of the system current is two control cycles of the command current. In order to improve the performance of the deadbeat- predictive control, compensation must be made. Assuming that the selected voltage vector is applied at the k+1 sampling time, the current at the k+2 sampling time must be predicted. Extrapolating the above equation one step back, then the current at the time of k+2 sampling is 2 1 1 (16) Substituting Eq. (6) and iSHCC(k+2)=iSHCC*(k) into Eq. (7) to sort out and deform the command value of the control signal can be obtained: ∗ 1 2 ∗ ∗ (17) where ucs * (k+1) works in the k+1 control cycle and is calculated in the k-k control cycle, u_cs^* (k) works in the k- th control cycle, It is calculated in the K-1 control cycle, and the combination of repeat control and deadbeat- predictive control is improved, and the block diagram of the no beat repeat control is as follows: P(z) Q(z)z-n Krz mS(z) i* SHCC + - + + d(z)e(z) Repeat control generators + + L Ts Z-1 + - - - iSHCC Fig 5. improved deadbeat-repetitive control diagram As can be seen from the graph, the closed-loop transfer function of the system is (18) 158 where Gopen is the open-loop transfer function of the uninterrupted beat. (19) According to the actual conditions, N is taken as 2000, and Q(z) is taken as 0.95 in practical application, and in order to make the controlled object show zero gain and zero phase shift characteristics in the high, medium and low frequency bands, the design is carried out according to krzmS(z)P(z)=1，Take Kr=1.02, zm =z5, z-N= z-40，The second-order low-pass filter is shown in Eq. (20). . . . . (20) According to the above controller parameters, a diagram of the amplitude and frequency characteristics of the non- differential beat control under frequency fluctuation is plotted, as shown in Figure 6. Fig 6. improved deadbeat-repetitive control Amplitude-frequency characteristic diagram As can be seen from the above figure, when the frequency fluctuates at the double doubling frequency ± 0.5HZ, the gain is maintained at a maximum of 34.3dB, so the steady-state error of current flow can be minimized. 5. Simulation Results and Analysis In order to verify the correctness and effectiveness of the control strategy, a train single-phase pulse rectifier model was built through the Matlab/Simulink software simulation platform, and its main parameters were set as follows: Table 1. Simulation parameters The name of the project parameter The name of the project parameter DC voltage Udc/V 3600 Switching frequency/Hz 1kHz Decoupling capacitor voltageUCs/V 3200V Decoupling inductors Lf/mH 0.3 Decoupling capacitorsCs/mF 2.0 Bus capacitors Cdc/mF 5.0 Under the same simulation conditions, the passive LC filtering, the repetitive control strategy and the repetitive control strategy without differential beat are compared and verified, and the simulation results are shown in the figures, including the voltage ripple on the DC side of the rectifier, the second harmonic Fourier analysis, and the response time analysis when the load is abrupt. As shown in Figure 7, the ripple on the DC side of the traditional LC filter is about 20V, and the repeated control is about 15V, which cannot accurately track the harmonic signal due to its cyclical delay. The improved DC side ripple is about 10V and has a small fluctuation without differential beat, which has better stability. As can be seen from Figure 8, the ripple harmonic distortion rate of the energy storage capacitor is 2.1%, which is 2.65% less than that of the traditional LC filter of 4.75% and 1.77% less than that of the repeated control of 3.87%. The beat-free repetition control makes the DC side current more stable. As shown in Figure 9, when the load is abrupt in 2 seconds, the response time of the traditional LC filter is 2.7s, the repeated control is 3.6s, and the repeated control without differential beat is 3s, which improves the dynamic response time compared with the repeated control, but because the addition of devices to the original circuit actually increases the system operation time, the time is 0.3s slower than that of the traditional LC filter, indicating that the anti-interference ability of the improved non-differential beat repetitive control 159 is stronger when the load is abrupt. In this paper, the Buck chopper active power decoupling circuit is used to replace the traditional LC filter circuit, and the electrolytic capacitor is replaced by a thin film capacitor, so as to extend the system life, and the capacitance capacity can be reduced by increasing the energy storage capacitor pulsation, so as to improve the power density of the system. (a) Conventional LC filtering (b) repetitive control (c) improved deadbeat-repetitive control Fig 7. DC side voltage (a) Conventional LC filtering (b) repetitive control (c) improved deadbeat-repetitive control Fig 8. DC side voltage spectrum 160 ΔT=2.7s ΔT=3.6s (a) Conventional LC filtering (b) repetitive control ΔT=3s (c) improved deadbeat-repetitive control Fig 9. Load change response graph 6. Summary (1) In this paper, the Buck chopper active power decoupling circuit is used to replace the traditional LC filter circuit, and the electrolytic capacitor is replaced by a thin film capacitor, so as to extend the system life, and the capacitance capacity can be reduced by increasing the energy storage capacitor pulsation, so as to improve the power density of the system. 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