IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 Structural and Electrical Properties Dependence on annealing temperature of a-Ge:Sb/c-Si Heterojunction A. A.Shehab, H. Kh.Al-Lamy*, and M. H.Mustafa Departme nt of Physics, College of Education I bn al Hathaim ,Unive rsity of Baghdad * De partment of Physics, College of Science ,Unive rsity of Baghdad Recei ved in June 9 2010 Accepted in June 30 2010 Abstract In this work, we are Study the effect of annealin g temp erature on the st ructure of a-Ge films dop ed with Sb and the electrical p rop erties of a-Ge:Sb /c- Si heterojunction fabr icated by deposition of a-Ge:Sb film on c-Si by using thermal evap oration. Electrical p rop erties of a- Ge:Sb/c-Si heterojunction include I- V characteristics in dark at different annealing temp eratures and C-V characterist ics and with the C-V characterist ics suggest that the fabricated heterojunction was abrupt type, built in p otential determin ed by extrapolation from 1/C 2 -V curve and show that t he built - inp otential (Vbi) for the Ge:Sb /Si sy stem increases with the increase of ann ealing temp eratures. Introduction IV-VI semiconductors are commonly considered to be p romising materials for optoelectronic, thermoelectric[1], and other IV-VI lay ers (chalco genid es) on Si substrates applications in the ( inexp ensive, st able material, high efficien cy p hotovoltaic solar cell, bipolar, transistors, p hoto sensors, integrated circuit, infrared d etectors, infrared light emitt ing diodes and electro p hotographic)[2,3,4,5]. There has been a rapidly growing interest in the p hy sical p rop erties of amorp hous semiconductors such as Si, Ge. One r eason for this is the extensive background knowledge and understanding of the cryst alline material. The other reason is that bein g elemental; they lack co mpositional disorder [6]. The p reliminary results of structural and electrical p rop erties of this alloy film have been p resented. Experime ntal Work Subst rates of p -type single cryst al Si wafers of r esistivity (3-5) ohm-cm and orientation(111) was used in the p resent study . After the division of these wafers into small p ieces (typically 0.8cm x 0.6cm in size), Si wafer was immersed and stirred in a chemical solution consists of 3ml HNO3 1ml H2O for (1 - 3) minutes. were cleaned ultrasonically by dipping in d istilled water, acetone and isop ropy l alcohol alternately. Aft er cleaning, the samples were oxidized in dry oxy gen [7]. The films of a-Ge:Sb wer e p repared by thermal evap oration in vacuum of the order of 10 -5 torr, the r ate of evap oration was equal to 9.43A/sec, onto clean silicon mirror-like side substrates at room temp erature (~300K). The average thicknesses of t he deposits were determined by microbalance method. The maximu m error in the determination of thickness was of the order of 10% estimated for the thinnest films (Ge:Sb/Si films of thickness equals t o 0.5 μm).Ohmic contacts of t he electrical IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 p rop erties of Ge:Sb/Si heterojunction, aluminum [8] were evap orated on the silicon side and Ge:Sb /Si side. Theoretical Part Heterojunction is contacts, with interesting electrical or electro- op tical p rop erties, between two different materials .T hey will therefor e be the sites, in gener al, of discontinuities in all the si gnificant semiconductor p arameters: energy gap , work function , lattice parameter , and effective mass[9]. The exp ression for the junction cap acitance p er unit area of an abrupt anisotyp e heterojunction can be written as [10].   21 aD 21 ppnn pnpn )VV( NN2 NNq A C             ……………………………………..(1) Where Nn and Np are the donor and accep tor concentrations resp ectively, n and p are the dielectric constant of n and p -type semiconductor resp ectively, VD is the built-in junction p otential, V is the ap p lied voltage, and A is t he area of the junction. From p lots of the relation between the forward current and bias voltage, the ideality factor (β) can be determined by the relation [11]:        S FB I I Ln V TK q ............................................................................................... (2) Where V is the forward bias voltage, If is the forward bias current, kB is the Boltzmann's constant, T is the absolute temp erature, q is charge of electron and IS saturation current. From current-voltage measurements we can determin e the p otential barrier height ( b) which can be determined by the relation: Js = A * T 2 exp (-qb/KBT)............................................................................................ (3) Where A* is the effective R ichardson constant. Result and Discussion XRD analysis X- ray diffraction (XRD) studies have been carried out to identify the Ge phase present in the film. Fig.1 shows that XRD p attern recorded on Ge film, coated on slide glass substrate. The structural of film is a morphous. I-V characteristics under dark One of the imp ortant p arameters of a heterojunction measurement is the current-voltage characterist ic which exp lains the behavior of the resultant current with the app lied forward and reverse bias voltage. Fig. (2) shows t hat I-V characterist ic for a-Ge:Sb/c-Si heterojunction at forward and reverse bias voltage at R.T and different annealing temp eratures (373,423.473)K. This result is in agreement with Chik et al[12] when thickness of films equals to 0.5 μm. IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 We observed that the current increases slightly with the increase of annealing temp eratures because the increases of temp eratures cause a rearrangement of the interface atoms and reducethe dangling bond, surface st ates and dislocation at interface lay er between a-Ge:Sb and c-Si which leads to the improvement of t he junction characterist ics . Also, we can notice from table (1) that the value of the ideality factor and p otential barrier height increases but saturation current decreases with the increase of annealing temp erature. This behavior att ributed to the improvement of cry st al st ructure at interface lay er ,also t he reduction of dangling bonds as well as the density of st ates in a-Ge:Sb. C-V characteristics The junction cap acitance variations as a function of the reverse bias (0 – 1.2) volt at frequency equal to 100KHz has been st udied, for a-Ge:Sb/c-Si heterojunction at different thicknesses of Ge:Sb lay er and annealing temp eratures are showed in Fig. (3). It is clear that the cap acitance decreases with the increase of the reverse bias voltage and annealing temp erature. This result is confirmed by equation (1) and the decreae was non- linear as shown in Fig. (3). We can observe from Table (2), that the cap acitance at zero bias voltage (Co) decreases with the increasing of the annealing temp eratures for a-Ge:Sb/c-Si junctions and this behavior is due to the surface st ates which leads to an increase in the dep letion lay er and a decrease of the capacitance. The inverse capacitance squar e is p lott ed against applied reverse bias voltage for a- Ge:Sb/c-Si heterojunction at different annealing temp eratures as shown in Fig. (4). The p lots revealed st raight line relationship which means that the junction was of an abrupt ty p e. The intercep tion of the st raight line with t he voltage axis at (1/C 2 = 0), rep resents the built-in p otential. We can see from table (2) and that the variation of built-in p otential (Vbi) from 0.589 to 0.893 Volt when annealing temp eratures changes from room temp erature to 473 K. Conclusion We get fro m the st udy the effect of annealing temp erature on the structure of Ge:Sb and electrical p rop erties of n-Ge:Sb/p-Si heterojunction the junction is abrup t type and the built - in p otential (Vbi.) for the n-Ge:Sb/p-Si Sy st em was found to increase with the increase of annealin g temp erature. Re ferences 1. Ietal, R. E.; Tavrina,T. V. ;Us,M .; Dresselhaus, M . S.; Cronin,S. B. and Rabin,O. (2002), Quantum size effects in IV-VI quantum wells, Phy sica. 2. Satio,N.; Aoki,K.; Sannomiy a, H. and Yamagu chi,T. (1984),Thin Solid Fi lms, 115 ,253. 3. Rudder,R.; Cook, J. and Lucovsy ,G. (1985),J. Vac. Sci. Tech. , V. A3 ,567 . 4. M alinovska,D. ; Nedial kova ,L. and Kudoy arova,V. (1993), Solar Ener. M ater. and Solar Cells, V.30, 27. 5. Sinha,A. ; A garwal, P. ; Kumar,S.; A garwal, S. ; Di xit,P.; Panwar,O. ; seth ,T. and Bhatt acharyya, R. (1993) ,p hy s. of semi. Dev. P. 595. 6. M ott ,N. F. and Davis, E.A. (1979) , E lectronic Processes in Non-Cry st alline M aterials, 2 nd Ed. University Press Oxford. 7. Holmes, P.J. (1962) ,T he Electrochemistry of Semiconductors, Academic Press, New York. 8. Etal,O. A. A. (1994) , The Nature of Some Contacts (Al, In, Ge, Sb and Bi) to Selenium Films, T r. J. of Phy sics, 18, 727-733. 9. Holt, D. (1966), J.Phy s.Chem.Solids,27, 1050 . IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 10. Sharma, B. L.; Purohit R.K. and M ukerjee, S.N. (1970) , Infrared Phy sics, 10, 225-231, p ergamon p ress, p rinted in Great Britain. 11. M ilnes,A. G. and Feucht,D. L. (1972), Heterojunctions and M etal-Semiconductor Junctions, Academic Press, New York . 12. Seager,C.H. ; Knot er M .L. and Clark, A.H. (1974) , Amorp hous and liquid semiconductors", Proceedings of the Fifth international conference on Amorp hous and liquid semiconductors, Taylor and Francis LTD-London. Table (1): value s of ideality factor (β), saturation current (Is) and potenti al barrier he ight (Фb) for a-Ge:S b/c-S i he terojunction with different thi ckne sses and annealing temperatures. Ta (K)  Is (μA) Фb(eV) R.T 1.591 0.0104 0.344 373 1.621 0.0096 0.345 423 1.627 0.0085 0.347 473 1.695 0.0067 0.352 Table (2): value s of Co and Vbi for a-Ge:S b/c-S i he terojunction with different thicknesses and anne aling te mperatures. Ta (K) Co (pF) Vbi ( Volt) R.T 18.1 0.589 373 16.11 0.667 423 11.88 0.727 473 10.19 0.893 IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 (a) (b) Fig.(1): X-ray diffraction of a-Ge films at (a) Ta =R.T (b) Ta =473K t=0.5mm -200 -150 -100 -50 0 50 100 150 200 250 -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 V(Volt) I( m A ) R T 3 73 K 4 23 K 4 73 K Fig. (2): I-V characteristi cs in the dark for a-Ge:S b/c-Si heterojunction at forward and reverse bias voltage at different annealing temperatures IBN AL- HAITHAM J. FOR PURE & APPL. S CI. VOL.24 (1) 2011 t=0.5mm 6 10 14 18 22 -1.5 -1 -0.5 0 V (volt) C (p F ) RT 373 K 423 K 473 K Fig. (3): The variati on of capacitance versus reverses bias voltage for a-Ge:S b/c-S i he terojunction for different annealing temperatures Fig.(4): The variati on of 1/C 2 versus reverses bias voltage for a-Ge:S b/c- Si he terojunction at diffe rent annealing temperatures 2011) 1( 24المجلد مجلة ابن الهیثم للعلوم الصرفة والتطبیقیة الهجیني على التلدین للمفرق التركیبیة والكهربائیة الخواصاعتماد a-Ge:Sb/c-Si محمد حامد مصطفى، *حسین خزعل الالمي.د، علیة عبدالمحسن شهاب جامعة بغداد،كلیة التربیة ابن الهیثم،قسم الفیزیاء جامعة بغداد،كلیةالعلوم،قسم الفیزیاء* 2010حزیران 9استلم البحث في 2010حزیران 30قبل البحث في الخالصة والخـــواص Sbب المطعمـــة a-Geالخـــواص التركیبیـــة الغشـــیة فـــي البحـــث دراس تـــأثیر التلـــدین فـــي هـــذا بطریقـــة التبخیـــر الحـــراري علـــى a-Ge:Sbالنـــاتج مـــن ترســـیب a-Ge:Sb/c-Siألهجینـــي الكهربائیــة للمفـــرق فولتیـة فـي حالـة الظـالم وبـدرجات تلـدین مختلفــة –تتضـمن خصـائص التیـارالخـواص الكهربائیـة للمفـرق الهجینـي .السـلیكون فولتیة تبین ان المفـرق الهجینـي كـان مـن النـوع المنحـدر وان جهـد –سعة ومن خصائص .فولتیة –وخصائص سعة درجــات یــزداد بزیـادة الفولتیـة ومقلــوب مربـع الســعة وتبـین ان جهــد البنـاء للمفــرق الهجینـي البنـاء تـم تحدیــده مـن منحنــي .حرارة التلدین