Microsoft Word - 2_V17No2_Compiled_v2_24Nov16.docx IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 83 CASCADE TOPOLOGIES FOR THE ASYMMETRIC MULTILEVEL INVERTER BY NEW MODULE TO ACHIEVE MAXIMUM NUMBER OF LEVELS EMAD SAMADAEI, SAYYED ASGHAR GHOLAMIAN*, ABDOLREZA SHEIKHOLESLAMI AND JAFAR ADABI Department of Electrical and Computer Engineering, Babol University of Technology Babol, Iran. *corresponding auhtor: gholamian@nit.ac.ir (Received: 16t h Mar. 2016; Accepted: 16th May. 2016; Published on-line: 30th Nov. 2016) ABSTRACT: Multilevel inverters have been introduced as useful devices to connect between DC-AC systems. Their high quality output and costs benefit a wide range of applications. Asymmetric multilevel inverters are a type of multilevel inverter with an unequal DC link to create more voltage levels through fewer components. This paper presents new topologies of cascade multilevel inverters by a new module with reduced components. The base module produces 13 levels with two types of unequal DC sources and 10 switches. Modular can be used to produce more and higher voltages levels. The designing of proposed multilevel inverter makes some preferable index with better quality than similar modular multilevel inverters, such as less semiconductors and DC sources, low switching frequency, creating of negative levels without any additional circuit, and module in cascade connections. Also, two cascade topologies are presented in the modular connections of the proposed module to achieve high and significant number of levels. Nearest level control (NLC) method as a switching technique is used in step changing levels for topologies to get more quality and lower harmonics. The presented module and cascade topologies are simulated by MATLAB/Simulink and are implemented by the experimental prototype in laboratory to validate the performance of proposed topologies in which simulated and experimental results show a good performance. THD% (Total Harmonic Distortion) of the module and cascade topology in experimental results calculated 4.94% and 2.05% respectively that satisfy harmonics standard (IEEE519). ABSTRAK: Inverter pelbagai peringkat telah diperkenalkan sebagai peranti berguna untuk menyambung antara DC-AC sistem. Sistem ini memberi output dan faedah kos berkualiti tinggi dan mempunyai pelbagai aplikasi. Inverter pelbagai peringkat asimetrik adalah sejenis inverter pelbagai peringkat dengan pautan DC yang tidak sama rata untuk mewujudkan lebih banyak paras voltan menerusi lebih sedikit komponen. Kertas kerja ini membentangkan topologi baru inverter pelbagai peringkat lata melalui modul baru dengan komponen yang dikurangkan. Modul asas mengeluarkan 13 peringkat dari dua jenis sumber DC tidak sama rata dan 10 suis. Modular boleh digunakan untuk mengeluarkan tahap voltan yang lebih banyak dan lebih tinggi. Mereka bentuk inverter pelbagai peringkat yang dicadangkan menghasilkan beberapa indeks dengan kualiti yang lebih baik daripada inverter modular pelbagai peringkat yang serupa, saperti sumber semikonduktor dan DC yang lebih rendah, frekuensi pensuisan yang rendah, kejadian tahap negatif tanpa sebarang litar tambahan, dan modul dalam sambungan lata. Juga, dua topologi lata ini dibentangkan dalam sambungan modular daripada modul yang dicadangkan untuk mencapai jumlah yang tinggi dan tahap yang ketara. Kaedah Tahap Kawalan Terdekat (NLC) sebagai teknik pensuisan digunakan dalam tahap langkah IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 84 berubah bagi topologi untuk mendapatkan harmonik yang lebih berkualiti dan lebih rendah. Topologi modul dan lata yang dibentangkan disimulasikan oleh MATLAB/Simulink dan telah dijalankan oleh eksperimen prototaip dalam makmal bagi mengesahkan prestasi topologi yang dicadangkan di mana hasil simulasi dan eksperimen menunjukkan prestasi yang baik. THD% daripada topologi modul dan lata dalam hasil eksperimen adalah 4.94% dan 2.05% masing-masing yang memenuhi harmonik standard (IEEE 519). KEYWORDS: asymmetric; component; multilevel inverter; power electronics; NLC 1. INTRODUCTION Energy is a key concern to the world. In the 1970s, during the energy crisis, renewable energy and other supplies of DC power became possible alternative sources of energy to replace carbon-based fuels. Recently, solar and wind sources have seen increased deployment because of their accessibility and non-polluting characteristics. Power electronics and multilevel converters play a crucial role in improving these typically DC systems. Multilevel converters have been one of the main subjects for DC systems research in the past decades because of their interesting features such as high quality output voltage, operation at high voltage/power levels, low stress on switches as switching frequency decreases, and rated voltage. Also, multilevel converters have a very wide range of applications [1-6]: HVDC systems, photovoltaic and wind plants, active power filters, and electrical machine drives. Multilevel converters are different arrangements of power electronic switches with DC links to create n-level waveforms on the output. Fig. 1: N-levels waveform on multilevel inverter output (9-levels). Fig. 2: Inverters categories. Figure 1 shows a sample waveform of multilevel output with 9 levels. Generally, multilevel converters are divided into three types [7]: NPC (Diode Clamped), FC (Flying IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 85 Capacitor), and CASCADE (Cascade H-Bridge). In 1981, the first multilevel converter introduced was of the NPC type. It could be used for medium voltage levels [8]. By the early 1990s, FC was presented [9], and in 1996, CHB was reintroduced [10]. Figure 2 shows the various categories of converters. In Fig. 2, there are two types in CHB multilevel, specifically: symmetric (with equal DC link), and asymmetric (with non-equal DC link). The design of asymmetric multilevel inverters considers many parameters: the number of levels, semiconductors and DC links, the amplitude of THD (Total Harmonic Distortion), the maximum voltage level, the creation of positive and negative levels, modular ability, and switch stress. Researchers have presented different types of modular multilevel converter. In [11], two switches and one source create each level. These levels are added together to reach (n/2) levels. In the end, an auxiliary circuit (H-bridge) is used to create negative levels and n-levels are added. H-bridge switches tolerate higher voltage than other switches. In [12], the H-bridge is divided into sub-modules with two capacitors added for each DC source to find more levels without requiring more semiconductor devices. Researchers have tried to reach more levels with fewer components. Modules are designed based on optimal use of DC sources by reduced switches [13-15]. In addition, a modular ability is considered to find higher voltage in topologies [16, 17]. There are several parameters to design ideal multilevel inverters for various applications. Some parameters are more important for some applications. For example, there is a high stress switch circuit on the end of H-bridges for high voltage applications. Redesigning modules to divide the H-bridge into sub-modules leads to increases in the number of semiconductors and thus leads to higher construction cost. Also, the total standing voltage (TSV) is raised on the module. Using the maximum capacity for the DC link can be achieved by suitable arrangement of the switches in a suitable topology. This arrangement improves economic cost of implementation, switching frequency, TSV, the number of levels, and THD. This paper presents a new asymmetric multilevel module with new cascade connection topologies. The module can be used as two cascade method connections and it does not need any additional circuit to create negative levels. Also, it makes 25 levels in the first method and 169 levels in the second method using only two modules. Section 2 illustrates the proposed multilevel inverters including module description, switching patterns, and cascade connection in each of the two methods. Nearest level control (NLC) method is introduced for switching modulation in section 3. Simulation and experimental results of the proposed topologies are shown in sections 4 and 5. 2. PROPOSED MODULE The proposed topology is illustrated in two parts: module configuration and cascade connection topologies. 2.1 Module Configuration This subsection introduces a new asymmetric modular multilevel inverter featuring new component arrangements including 10 switches, 10 diodes, and 4 DC supplies with different voltage outputs (two 2VDC, two 1VDC). The arrangement of these components is very smart to produce 13 levels (6 positive levels, 6 negative levels, and a zero level) without any additional circuitry to create negative levels. Additionally, negative levels are inherent to the model and it does not need an H-bridge converter. Figure 3 depicts the proposed module. IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 86 S1 S2 S3 S4 S5 S6 S7 S8 2VDC 2VDC 1VDC 1VDC A B Fig. 3: Proposed multilevel inverter. Of 10 switches, 4 switches work as two pair (S7, S8), which means the module has 6 unidirectional switches and 2 pairs of bidirectional switches. It helps to reduce switch drivers down to 8 drivers. 4 DC supplies are different amplitude to create different levels of output. Also, equations for the number of components are written as follows: Nlevels=12n+1 (1) Nswitches=10n (2) Ndiodes=10n (3) NDrivers=8n (4) NDC links=4n (5) Total Standing Voltages (TSV)=20n × VDC (6) where N and n are the number of levels and module units, respectively. Eqs. 2 to 6 can be rewritten as Eqs.7 to 11 based on number of levels (NL): Nswitches=5(NL-1)/6 (7) Ndiodes=5(NL-1)/6 (8) NDrivers=4(NL-1)/6 (9) NDC links=(NL-1)/3 (10) Total Standing Voltages (TSV)= 10(NL-1)/6 (11) Table 1 describes the switching pattern and demonstrates that positive and negative levels have symmetrical paths to each other. S1 and S4 belong to positive levels and S2 and S3 belong to negative levels. Also (S1, S2) and (S3, S4) cannot be on at the same time. Three switches are on with some DC sources for each level pattern. Switches S1, S6, and S7 and the upper left side and the lower right side in series from DC sources are used for +1VDC. Switches S1, S7, and S8 with the upper left side of DC sources create +2VDC. Adding the upper left side and the lower left side DC sources switches S1, S5 and S7 make +3VDC. Two upper side of DC sources and switches S1, S4 and S6 generate +4VDC. Two upper sides and the lower right side of DC sources and switches S1, S4 and S8 are considered for +5VDC. Finally, all DC sources by switches S1, S4 and S5 are used to achieve +6VDC. Similarly, the negative levels are available as symmetrically. IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 87 The module is designed for switches with low switching frequency. Table 2 illustrates that the switching frequency of each switch per cycle is low. The output voltage waveform has 24 steps for each sinusoidal cycle. If system frequency is assumed to be 50 Hz, there are four switches (S1, S2, S3 and S4) with a 50 Hz in sinusoidal waveform and the maximum switching frequency is 400 Hz for S8. This guarantees less switching losses and longer life. Table 1: Switching table of the proposed module Levels S1 S2 S3 S4 S5 S6 S7 S8 the upper left side DC source (±2VDC) the upper right side DC source (±2VDC) the lower left side DC source (±1VDC) the lower right side DC source (±1VDC) P os it iv e L ev el 1VDC 1 0 0 0 0 1 1 0 √ √ 2VDC 1 0 0 0 0 0 1 1 √ 3VDC 1 0 0 0 1 0 1 0 √ √ 4VDC 1 0 0 1 0 1 0 0 √ √ 5VDC 1 0 0 1 0 0 0 1 √ √ √ 6VDC 1 0 0 1 1 0 0 0 √ √ √ √ N eg at iv e le ve l -1VDC 0 1 0 0 1 0 1 0 √ √ -2VDC 0 1 0 0 0 0 1 1 √ -3VDC 0 1 0 0 0 1 1 0 √ √ -4VDC 0 1 1 0 1 0 0 0 √ √ -5VDC 0 1 1 0 0 0 0 1 √ √ √ -6VDC 0 1 1 0 0 1 0 0 √ √ √ √ Table 2: Switching for each cycle and 50 Hz sinusoidal waveform S8 S7 S6 S5 S4 S3 S2 S1 Switch Number 8 4 7 7 1 1 1 1 Number of turning on for each switch in one cycle (13 level) 400 200 350 350 50 50 50 50 Frequency of each switch in 50Hz sinusoidal waveform Table 3: Comparison some modular multilevel inverter topology for 13 levels (For 13 levels) NPC FC CHB CSMLI [14] Proposed module Switches num. 24 24 24 14 10 Diodes num. (+diode clamped) 24+20 24 24 14 10 DC links num. 6 6 6 6 4 Drivers 24 24 24 14 8 )DCTSV (x V 24 24 24 24 20 Modular able complicate complicate simple simple simple Some famous topologies are compared with the proposed module in Table 3 to evaluate of number of components. Table 3 illustrates the number of components for 13 levels specifically in NPC, FC, CHB and CSMLI. Table 3 declares that the proposed module has the lowest number components of all topologies. The last column describes IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 88 how at least 4 switches, 4 diodes, 2 DC links, and 6 drivers are used in the proposed module fewer than other columns. Also TSV is reduced down to 20VDC. 2.2 Cascade Connections The modularity of the cascade connections is another feature of the proposed inverter enabling the creation of more levels and the use of alternative switching paths. Two cascade topologies are considered for the cascade connection to achieve greater performance. In the first cascade topology, each module (unit) has two 1VDC and two 2VDC DC links. Units are joined in series to obtain the output voltage (see Fig. 4). In this topology, multiple units can create the total output voltage. In other words, for two units, 6 levels are added on positive levels and 6 levels are added on negative levels (adding of 12 levels, totally). Also, there are more switching state choices for each level which causes a high reliability. For example, there are 10 switching paths to produce total output voltage for Vout=3VDC Where Vj is output voltage of unit j:(3V1+0V2), (2V1+1V2), (1V1+2V2), (0V1+3V2), (-1V1+4V2),(-2V1+5V2), (-3V1+6V2), (4V1-1V2), (5V1-2V2) and (6V1-3V2). A1 B1 A2 B2 S1 S2 S3 S4 S5 S6 S7 S8 2VDC 2VDC 1VDC 1VDC S1 S2 S3 S4 S5 S6 S7 S8 2VDC 2VDC 1VDC 1VDC A1 B1 A2 B2 S1 S2 S3 S4 S5 S6 S7 S8 2VDC 2VDC 1VDC 1VDC S1 S2 S3 S4 S5 S6 S7 S8 26VDC 26VDC 13VDC 13VDC Fig. 4: The first proposed cascade topology (two unit). Fig. 5: The second proposed cascade topology (two unit). In multi-unit cascade connections, there are many redundant switching states used to produce more levels and higher performance by using the second topology. For the second cascade topology, each module has a different amount of DC links in which the first unit has two 1VDC and two 2VDC DC links and the second unit has two 13VDC and two 26VDC DC links. These eight DC links can be connected together by different paths to generate more levels than the first cascade topology so that 169 levels can be achieved by the second topology. Figure 5 illustrates the second proposed topology. DC links of each unit are calculated as follows (n=number of unit: 2, 3, 4, … and n): Amplitude of lower DC links pair of unitn = 2 × (the maximum positive level of unitn-1) +1 Amplitude of the upper DC links pair of each unitn = 2 × (Amount of lower DC links of unitn) IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 89 Table 4 demonstrates the switching pattern of the second cascade topology from level -84 to level +84. Levels are created by unit1 and unit2. Unit2 creates 0, ±13VDC, ±26VDC, ±39VDC, ±52VDC, ±65VDC, ±78VDC and unit1 creates 0, ±1VDC, ±2VDC, ±3VDC, ±4VDC, ±5VDC, ±6VDC for middle levels between levels of unit2. Table 4: The Switching pattern of the second cascade topology for levels: -84 to +84 Levels DC Sources Switching Pattern for Unit2 From Unit1 (*) From Unit2 S1 S2 S3 S4 S5 S6 S7 S8 -84 to -72 (±2VDC±2VDC± VDC ±VDC) -26VDC -26VDC -13VDC -13VDC 0 1 1 0 0 1 0 0 -71 to -59 (±2VDC±2VDC± VDC ±VDC) -26VDC -26VDC -13VDC 0 1 1 0 0 0 0 1 -58 to -46 (±2VDC±2VDC± VDC ±VDC) -26VDC -26VDC 0 1 1 0 1 0 0 0 -45 to -33 (±2VDC±2VDC± VDC ±VDC) -26VDC -13VDC 0 1 0 0 0 1 1 0 -32 to -20 (±2VDC±2VDC± VDC ±VDC) -26VDC 0 1 0 0 0 0 1 1 -19 to -7 (±2VDC±2VDC± VDC ±VDC) -13VDC 1 0 1 0 0 0 0 1 -6 to +6 (±2VDC±2VDC± VDC ±VDC) 0VDC 1 0 1 0 1 0 0 0 +7 to +19 (±2VDC±2VDC± VDC ±VDC) +13VDC 0 1 0 1 0 0 0 1 +20 to +32 (±2VDC±2VDC± VDC ±VDC) +26VDC 1 0 0 0 0 0 1 1 +33 to +45 (±2VDC±2VDC± VDC ±VDC) +26VDC +13VDC 1 0 0 0 1 0 1 0 +46 to +58 (±2VDC±2VDC± VDC ±VDC) +26VDC +26VDC 1 0 0 1 0 1 0 0 +59 to +71 (±2VDC±2VDC± VDC ±VDC) +26VDC +26VDC +13VDC 1 0 0 1 0 0 0 1 +72 to +84 (±2VDC±2VDC± VDC ±VDC) +26VDC +26VDC+13VDC +13VDC 1 0 0 1 1 0 0 0 (*) Switching pattern for Unit1 is based on Table 1 3. NEAREST LEVEL CONTROL (NLC) MODULATION METHOD As a switching technique, the simplified nearest level control method is used in the proposed modular multilevel inverter [18]. The aim is to use the NLC method in inverter with a high number of levels which can reduce and simplify the calculation of the processor. Figure 6 presents the NLC method pictorially. As shown in Fig. 6a, the controller samples a point from reference voltage (Vref) and then rounds it to the nearest of voltage level (VaN). Each voltage level has a switching logic according to the switching lookup table to change switch status (Fig. 6b). The sampling is repeated for each sample time (Ts). a b Fig. 6: Nearest level control (a) waveform synthesis (b) control diagram. IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 90 4. SIMULATION RESULTS The proposed multilevel inverter is simulated using MATLAB/SIMULINK to examine the performance of the proposed module. Figure 7 shows the output voltage of 13-levels for the proposed multilevel inverter with NLC switching technique. Each level (VDC) is 50 volts. THD% is calculated 3.87% by FFT analysis for waveform of Fig. 7 which satisfied IEEE519 (i.e max. of THD%: 8%). Fig. 7: The waveform of output voltage for the proposed module (simulation). Figures 8 and 9 depict the results of the first and the second cascade topologies with the NLC switching technique. They confirm the performance and modular abilities of proposed topologies as 25 levels with THD=1.99% for the first cascade topology and 169 levels with THD=0.11% for the second cascade topology. Cascade topologies are known to offer good performance in creating waveforms similar to the sinusoidal waveform with low harmonics. Fig. 8: The waveform of output voltage for the first cascade topology (25 levels) (simulation). Fig. 9: The waveform of output voltage for the second cascade topology (169 levels) (simulation). 5. EXPERIMENTAL RESULTS A sample prototype was built in the laboratory to validate the basic proposed module and modular connections with consideration of the limitations in laboratory facilities. Each level is considered 50 volts; thus, there are two 50 volts and two 100 volts DC sources for modules. IGBT 12N60A4, Diode RHRP15120 are used in the laboratory model. Microcontroller ATMEGA16A creates a pulse for switches and HCPL3120 drives IGBTs (Fig. 10). Figure 11 shows the experimental setup in laboratory. The output of the one module (Fig. 3) is a 50 Hz sinusoidal waveform shown in Fig. 12. Also, Fig. 13 depicts output voltage waveform for the first cascade topology (Fig. 4) with 25 levels. Experimental THD is 4.94% and 2.05% for 13 levels and 25 levels, respectively. As the comparison of Fig. 12 and Fig. 13a indicates, the voltage waveform with 25 levels is more similar to a sinusoidal waveform. Also, Fig. 13b and Fig. 13c shows the voltage waveform IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 91 of each unit for the cascade topology. The cascade topology shows greater quality with higher waveform resolution and its peak to peak voltage (Vp-p) reaches 1.2 KV against Vp-p of 13 levels voltage waveform, which is 0.6 KV. Consequently, the experimental test results based on module and cascade topologies show good performance to get more and higher levels by this creative topology. Vin1 Vin2 Vout 1 Vout 1 Vout 2 Vout 2 HCPL3120 BUFFERATM16 IGBT/DIODE Fig. 10: Schematic of laboratory configuration. Fig. 11: Picture of experimental setup in laboratory. (a) (b) Fig. 12: The output voltage of the proposed multilevel for the base module (a) and spectral analysis (b), 13-level (experimental test). (a) (b) (c) Fig. 13: The output voltage for the first cascade topology in the proposed multilevel (two unit), 25-Level (experimental test) (a) output voltage waveform in Fig. 4 (b) for unit1 in Fig. 4 (c) for unit2 in Fig. 4. IIUM Engineering Journal, Vol. 17, No. 2, 2016 Samadaei et al. 92 6. CONCLUSION Nowadays, DC systems and DC sources are widespread. Power quality is the most important quality of these systems for the connection of DC-AC systems. Inverters are coupled with devices of DC-AC connections. This paper presented two new topologies of the multilevel inverter by a new proposed module. The proposed module creates 13 levels of voltage waveform through reduced components. It can be used in high voltage/power and using in DC systems (PV, FC, Battery, DFIG, and HVDC), because the module is able to easily be set in a cascade arrangement and offers low switching frequency for good design. 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