MEV


 

 

Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 
 

Journal of Mechatronics, Electrical Power, 
and Vehicular Technology 

 
e-ISSN: 2088-6985  
p-ISSN: 2087-3379  

 

 

mev.lipi.go.id 

 
 

 
doi: https://dx.doi.org/10.14203/j.mev.2023.v14.80-86 
2088-6985 / 2087-3379 ©2023 National Research and Innovation Agency  
This is an open access article under the CC BY-NC-SA license (https://creativecommons.org/licenses/by-nc-sa/4.0/) 
MEV is Scopus indexed Journal and accredited as Sinta 1 Journal (https://sinta.kemdikbud.go.id/journals/detail?id=814) 
How to Cite: A. Jaya et al., “Design and implementation of capacitor array as dc converters for electrical lighting in limited area,” Journal of 
Mechatronics, Electrical Power, and Vehicular Technology, vol. 14, no. 1, pp. 80-86, July 2023. 

Design and implementation of capacitor array as DC converters 
for electrical lighting in limited area 

Arman Jaya a, *, Irianto a, Afif Aulia Rahman a, Kyungmin Sung b 
a Departement of Electrical Engineering, Electronic Engineering Polytechnic Institute of Surabaya  

Keputih Sukolilo, Surabaya, Indonesia 
b National Institute of Technology, Ibaraki College  

866 Nakane, Hitachinaka-shi, Ibaraki-ken 312-8508, Japan 
 

Received 20 March 2023; 1st revision 10 July 2023; 2nd revision 12 July 2023; Accepted 13 July 2023; Published online 31 July 2023 
 
 

Abstract  

The widely used DC-DC converters are inductor-based DC-DC converters and inductors along with combustion. The use of 
inductors can lead to large power losses, as well as heavy components in real terms. The proposed converter warning array 
aims to increase the voltage with a large increase ratio through a switching configuration process. This switching method is 
very simple and uses two pulses that are opposite each other so that the array converter can work optimally, whose function is 
to adjust the arrangement in a parallel arrangement to a series arrangement. The advantage of using a device is that it makes 
DC-based DC conversion lightweight and easy to implement. Tests have been carried out on 5 hanger arrays with a power of 80 
W and 65 W, and the data from the test results show that the voltage increase ratio reaches 81.5 % or 4.08 times the input 
voltage, which indicates that the array converter warning is able to increase the input voltage according to the number of the 
arrays. 

Copyright ©2023 National Research and Innovation Agency. This is an open access article under the CC BY-NC-SA license 
(https://creativecommons.org/licenses/by-nc-sa/4.0/).  

Keywords: inductor-based converter; inductor and capacitor-based converter; capacitor array.  

 
 

I. Introduction 
At this time, the use of dc converters to increase 

and or decrease the input voltage is widely used in 
several applications such as DC houses, battery 
charging, and so on. DC converters that have been 
widely implemented are DC converters that use 
inductors [1][2]. This type of converter can increase 
and decrease the input voltage by using a variable 
duty cycle ratio [3] as well as using the transformer 
winding ratio for a significant increase in voltage 
levels. In addition, during switching transitions, it 
can cause transformer leakage at high frequencies 
[4][5], as well as requiring an air gap to prevent core 
saturation due to high DC currents [6][7]. 

To raise the ratio level to a high level also 
developed a converter that combines the functions 
of the inductor and capacitor [8][9], as also 
represented by [10][11] the structure uses two 
inductors assisted by a transformer ratio for the 

input voltage step of 45 V to 450 V output from the 
capacitor. In [12][13] it was also introduced the use 
of 2 inductors and a pump capacitor at the input to 
store and distribute energy to the load. However, in 
addition to this complicated converter and the 
presence of power losses due to switching, it can 
reduce the performance of this converter [14]. 

A switching capacitor converter has been 
introduced in [15], which focuses on the 
characteristics of the switching process. In [16][17] a 
switching capacitor converter that analyzes the 
power loss during the switching transition is also 
introduced. The switching capacitor converter that 
was introduced before has not analyzed the increase 
in the resulting input voltage over a larger range, 
some at zero voltage switching [18]. The topology 
introduced focuses on analyzing the increase in 
input voltage based on the arrangement of 
capacitors using the capacitor switching method. In 
addition to the components used is quite simple, 
using only MOSFETs and capacitors, systems that are 
lightweight and also have high efficiency, as well as 
smaller switching losses [19][20], the topology 

 
 
* Corresponding Author. Tel: +62-811-309-592 

E-mail address: arman@pens.ac.id 

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 A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 
 

 

81 

introduced also has a different structure, where the 
capacitor is charged in a parallel configuration, and 
discharged in a series configuration, to generate an 
output voltage equal to the input voltage multiplied 
by the number of capacitor arrangements. 

II. Materials and Methods 
The input voltage level is increased by a capacitor 

array using two switching configurations that 
function to change the arrangement of the capacitor. 
Capacitor charging is regulated through a number of 
switches for parallel configuration, while the 
increase in voltage level occurs when the capacitor is 
in series. 

Figure 1 shows the use of microcontrollers. In 
this system, namely to generate PWM opposite each 
other visited on MOSFET drivers with specifications 
that are able to accept switching with high 
frequencies, so that the switching configuration on 
the capacitor converter array can work optimally. 

The proposed capacitor array, as shown in 
Figure 2, has 5 total capacitor arrangements with 1 
buffer capacitor. The capacitor array charges when 
switches Q1, Q3, Q5, Q7, Q9 is on and switches Q2, 
Q4, Q6, Q8 is off. D1, D2, D3, and D4 are forward 
biased, so that the capacitor in parallel arrangement 
with the amount of charging voltage can be 
calculated by the equation (1) and equation (2), 

𝑉𝐶(𝑡) = 𝑉𝑠(𝑡)(1 − 𝑒
−𝑡
𝑅𝑅)  (1) 

where 𝑉𝐶(𝑡) is charging voltage across the capacitor 
(V), 𝑉𝑠(𝑡) is input voltage (V), RC is time constant (s), t 
is charging time in capacitor (s), 𝑒 is Euler’s number 
is 2.7182. 

𝑉𝐶1 = 𝑉𝐶2 = 𝑉𝐶3 = 𝑉𝐶4 = 𝑉𝐶5 = 0.99𝑉𝑖𝑖 (2) 

where 𝑉𝐶1 = 𝑉𝐶2 = 𝑉𝐶3 = 𝑉𝐶4 = 𝑉𝐶5 is voltage across 
capacitors 1 to 5 (V). 

To raise the input voltage level, the capacitor 
releases its charge to the load when the switches Q2, 
Q4, Q6, and Q8 are on and switches Q1, Q3, Q5, Q7, 
and Q9 are off. D1, D2, D3, and D4 reverse biased, so 
that the capacitors are in series. The amount of 
voltage received by the buffer capacitor is the sum of 
the discharge voltages on each capacitor, calculated 
by the equation (3), 

𝑉𝑜(𝑡) = 𝑉𝐶(𝑡) × 𝑒
−𝑡
𝑅𝑅  (3) 

where 𝑉𝑜(𝑡) is Output voltage capacitor (V), 𝑉𝐶(𝑡) is 
the voltage is stored in the capacitor (V), RC is time 
constant (s), t is charging time in capacitor (s), 𝑒 is 
Euler’s number 2.7182. 

Figure 3(a) and Figure 3(b) show the operating 
principle of the capacitor array. The capacitor array 
has 5 total capacitors with two circuit configurations 
as shown in Figure 3. In charging mode, the 
capacitors are in a parallel configuration, and the 
voltage across capacitor 1 is equal to capacitors 2 to 
5. In ideal conditions, the charging voltage across the 
capacitor is equal to the input voltage, which is 24 
Vdc. This is in accordance with the nature of the 
capacitor, which is that it can store voltage according 
to the input given. In discharging mode, the 
capacitors are in a series configuration. The voltage 
stored on each capacitor accumulates and the output 
voltage is 5 times the input voltage, according to the 
series configuration in Figure 3. 

 
Figure 1. Block diagram of the capacitor array system 

 
Figure 2. Array capacitor topology 



A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 

 

82 

The buffer capacitor value of the capacitor array 
must be able to accommodate the total voltage 
resulting from the sum of the voltage multiplier 
capacitors, so as to design the buffer capacitor value 
using the highest power of the load to be used. The 
amount of the buffer capacitor can be calculated by 
equation (4), 

𝐶𝑏𝑏𝑏𝑏 ≫
𝑃𝑜
1
2𝑉𝑜

2  (4) 

where 𝐶𝑏𝑏𝑏𝑏 is buffer capacitor (µF), 𝑃𝑜 is capacitor 
output power (W), 𝑉𝑜(𝑡) is capacitor output voltage 
(V) 

III. Results and Discussions 
The proposed system is built using component 

specifications as shown in Table 1. Figure 4 is a 
summary of the work system of the capacitor array, 
which has 5 process stages. From this process, the 
importance of the MOSFET driver so that the 
capacitor array can optimally work in parallel and 
series configurations. The parameters above are the 
parameters used in the converter capacitor array 
system with the component specifications that have 
been taken into account. The most important part of 

this system is maximizing the performance of the 
switching generated by the microcontroller via the 
MOSFET driver. The use of IRFP460 MOSFET type is 
able to handle high switching frequencies up to 
1 Mhz, so it is safe during prototype testing. 

 
(a) 

 
(b) 

Figure 3. (a) array capacitor charging; (b) array capacitor discharging 

Table 1. 
Array capacitor parameters 

Parameter Unit 

DC input voltage 24 V 

DC ouput voltage 110 V 

Switching frekuensi minimum 5 kHz 

Capacitor  22 µF 
Capacitor buffer 10 kµF 
Diode  MUR1560 (fast recovery) 

Switch Q MOSFET IRF460 
 

 
Figure 4. Flowchart experiment array capacitor 



 A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 
 

 

83 

The testing process uses a power supply as the 
input voltage and a load of 3 lamps arranged in 
parallel, which are turned on alternately to regulate 
the amount of load power that must be supplied by 
the capacitor array. The experiment uses 
2 voltmeters installed at the input and output of the 
capacitor array to determine the actual increase in 
the input voltage ratio. The magnitude of the 
switching frequency is controlled using a 
microcontroller, according to Table 2. 

Figure 5 represents the hardware designed to the 
specifications in Table 1, with a minimum planned 

switching frequency of 5 kHz, which is passed on to 
the MOSFET driver. The MUR 1560 fast recovery 
diode functions as a controlless switch when the 
capacitor is in a parallel configuration. The capacitor 
used is 22 μF with a voltage capacity of 400 V, in 
order to be able to receive input voltage when the 
charging process is in a high frequency of 20 kHz. 

Table 2 shows the data from the test results of 
the array capacitor at a load of 80 W and 65 W. Input 
voltage is increased in 2 Volt steps from 8V to 24V at 
each switching frequency of 5 kHz to 20 kHz. For a 
power of 80 W at a nominal input voltage of 24 V, 
the resulting output voltage reaches 3.8 times the 
input voltage. There is a difference in the power of 
65 W at a nominal input voltage of 24 V, reaching 
multiples of 4.07 times. The switching frequency 
affects the amount of charging current in the 
capacitor when the parallel configuration is 
configured. The magnitude of the switching 
frequency is proportional to the magnitude of the 
charging current in the capacitor because the 
capacitor is forced to charge in a faster time which 
causes heat in the capacitor. This can be seen at a 
power of 80 W. A switching frequency of 20 kHz 
reduces the ratio of the increase in input voltage, 
due to the inability of the capacitor to receive a 
charging current that is too large. Figure 6 is an 
image of the testing process of the capacitor array at 

 
 

Figure 5. Array capacitor prototype 

Table 2. 
Data from testing the capacitor array for 80 W and 65 W power 

f (kHz) 𝑽𝒊𝒊 (V) 𝑰𝒊𝒊 (A) 𝑽𝒐𝒐𝒐 (V) 𝑰𝒐𝒐𝒐 (A) 
𝑽𝒐
𝑽𝒊𝒊

 𝑷𝒐𝒐𝒐 (W) Load 

5 8 2.51 21.4 0.43 2.6 9.21 

80 W 

12 3.28 38.6 0.54 3.2 20.8 

16 3.4 56.6 0.64 3.5 36.2 

20 4.5 74.7 0.74 3.7 55.3 

24 5.17 96 0.84 3.9 79.9 

10 8 2.82 21.9 0.43 2.7 9.43 

12 3.71 39 0.54 3.24 21.0 

16 4.5 57 0.65 3.55 37.1 

20 5.16 75.4 0.74 3.75 55.7 

24 5.78 97 0.83 3.91 80.8 

20 8 7.39 20.4 0.37 2.52 8.58 

12 11 36.7 0.47 3.05 19.4 

16 14.87 54.5 0.58 3.4 34.3 

20 18.72 72.7 0.68 3.62 53.0 

24 23.08 93.5 0.77 3.8 77.6 

5 8 1.87 24.1 0.309 2.97 7.45 

65 W 

12 2.55 41.5 0.40 3.45 16.8 

16 3.15 59.3 0.496 3.69 29.4 

20 3.64 78.2 0.57 3.89 44.6 

24 4.15 99.8 0.65 4.05 64.7 

10 8 2.28 24.3 0.31 2.99 7.48 

12 3.12 41.9 0.41 3.47 16.7 

16 3.86 59.8 0.49 3.71 29.3 

20 4.44 78.6 0.57 3.89 44.6 

24 4.97 100 0.65 4.07 65.2 

20 8 3.2 22.3 0.29 2.75 6.43 

12 4.56 38.5 0.39 3.2 15 

16 5.63 56.4 0.43 3.51 27.0 

20 6.45 74.2 0.56 3.69 41.5 

24 7.12 96 0.64 3.91 61.8 

 



A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 

 

84 

a switching frequency of 20 kHz and a load of 80 W. 
This test uses a power supply with a capacity of 
450 W with input voltage steps, as shown in Table 2. 
In addition, the capacitor array has also been 
simulated using PSIM software to compare the 
simulation results with direct hardware testing with 
the same capacity and specifications. The following 
is a comparison of the simulation results. 

Figure 7 shows the experimental results at a 
maximum power of 100 W. Minimum switching 
frequency given is 5 kHz and varied up to 20 kHz can 
be seen in the simulation comparison results. At 
minimum frequency, the simulation voltage ratio 
reaches 81.58 %, while the hardware test results 
reach 80 %. The maximum increase level achieved on 
hardware is 10 kHz with an increased ratio of 
81.05 %, while the simulation is higher, namely 
86.3 %. There is a saturation of the capacitor at a 
frequency of 15 kHz, which causes a decrease in the 
increase in the voltage ratio of 79.1 %. This is due to 
the inability of the capacitor to accept large charging 
currents at a frequency of 15 kHz. So that when the 
frequency is increased to 20 kHz, the reduction ratio 
is even greater, reaching 77 %. The effect of an 
extensive charging current can increase the 
temperature of the capacitor if, for a long time, it can 
reduce the resistance of the capacitor. In the test 
conditions above, the maximum frequency that the 
capacitor can receive to work optimally is 15 kHz. 
This means that to increase the input voltage from 
the power supply, the optimal frequency must be 
given 15 kHz. 

The comparative results of hardware testing and 
simulation have shown that the converter capacitor 

 
Figure 6. Array capacitor test 

 
(a) 

 

(b) 

Figure 7. (a) comparison of simulation and hardware on changes in switching frequency; (b) comparison of the ratio of the simulated output 
voltage level andthe hardware at a change in input voltage f 10 kHz 

97.9 

103.6 

108 
112 

96 

98 

95 
94 

92

94

96

98

100

102

104

106

108

110

112

114

0 5 10 15 20 25

O
u

tp
u

t 
V

o
lt

ag
e 

(V
) 

Switching frequency (kHz) 

Simulation

Hardware

39.5 

51.2 

68.7 

84.6 

103.8 

21.4 

38.6 

56.6 

74.7 

96 

0

20

40

60

80

100

120

0 5 10 15 20 25 30

O
u

tp
u

t 
V

o
lt

ag
e 

(V
) 

Input Voltage (V) 

Simulation

Hardware



 A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 
 

 

85 

array has succeeded in increasing the input voltage 
up to 4 times by using the switching method. It can 
be seen that the comparison of the percentage 
increase between the simulation and the hardware is 
quite small at each switching frequency. At a 
frequency of 10 kHz, as shown in Table 2, it is known 
that the capacitor array is capable of supplying 
power according to the design, namely a maximum 
of 80 W, with a generated power of 80.8 W. 
generated by the capacitor array of 65.2 W. While 
the comparison of the results of the ratio of the 
increase in the output voltage of the simulation and 
hardware as shown in Figure 7, that the simulation 
has a greater increase ratio of 5 % compared to the 
hardware test results because the components used 
in the simulation are in ideal conditions so that there 
is no diode voltage drop even in the switching 
process, whereas, at the knee voltage hardware on 
the diode, the presence of a large switching 
frequency becomes a factor in reducing the increase 
in output voltage ratio. 

IV. Conclusion 
The results of the capacitor array have been 

discussed in section 3, which shows that the 
capacitor array is able to increase the voltage up to 4 
times the input voltage of 24 Vdc, with a percentage 
of 81.05 % in hardware and 86.3 % in the simulation, 
which shows that the switching capacitor method 
successfully configures the array of the capacitor to 
increase the voltage. In addition, the capacitor array 
is capable of supplying 80 W of power with an 
output voltage of 98 Vdc with an increase in voltage 
level ratio of 3.9 times the input voltage. At 65 W, 
the output voltage of the capacitor array reaches 
100 Vdc and the gain ratio is 4 times that of the 
input voltage.  

Acknowledgements 

This research is for the final project of the 
Industrial Electrical Engineering Study Program at 
Surabaya State Electronics Polytechnic with the hope 
that it can be implemented in areas with limited 
electricity. The author would like to thank the 
supervisors who have guided and provided input 
and participated in supporting the realization of this 
tool. 

Declarations 
Author contribution 

A. Jaya: Conceptualization, Formal-analysis, Writing-
concept, Review & Advisor, Validation. A.A. Rahman: 
Writing, Define-parameter-componen, Original-draft, 
Editing, Data-simulation. Irianto and K. Sung: Finishing, 
Conceptualization, Advisor, Validation. 

Funding statement 

This research did not receive any specific grant from 
funding agencies in the public, commercial, or not-for-
profit sectors.  

Competing interest 

The authors declare that they have no known 
competing financial interests or personal relationships that 
could have appeared to influence the work reported in this 
paper. 

Additional information  

Reprints and permission: information is available at 
https://mev.lipi.go.id/. 

Publisher’s Note: National Research and Innovation 
Agency (BRIN) remains neutral with regard to jurisdictional 
claims in published maps and institutional affiliations. 

References 
[1] M. R. Banaei and H. A. F. Bonab, “A high efficiency nonisolated 

buck-boost converter based on ZETA Converter,” IEEE Trans. 
Ind. Electron., vol. 67, no. 3, pp. 1991–1998, 2020. 

[2] A. Alzahrani, M. Ferdowsi, and P. Shamsi, “A family of scalable 
non-isolated interleaved DC-DC boost converters with voltage 
multiplier cells,” IEEE Access, vol. 7, pp. 11707–11721, 2019. 

[3] X. Weng et al., “Comprehensive comparison and analysis of 
non‐inverting buck boost and conventional buck boost 
converters,” J. Eng., vol. 2019, no. 16, pp. 3030–3034, 2019. 

[4] K. Nathan, S. Ghosh, Y. Siwakoti, and T. Long, “A new DC-DC 
converter for photovoltaic systems: coupled-inductors 
combined Cuk-SEPIC converter,” IEEE Trans. Energy Convers., 
vol. 34, no. 1, pp. 191–201, 2019. 

[5] P. Alavi, P. Mohseni, E. Babaei, and V. Marzang, “An ultra-high 
step-up dc-dc converter with extendable voltage gain and 
soft-switching capability,” IEEE Trans. Ind. Electron., vol. 67, 
no. 11, pp. 9238–9250, 2020. 

[6] S. Chen et al., “Research on topology of the high step-up boost 
converter with coupled inductor,” IEEE Trans. Power Electron., 
vol. 34, no. 11, pp. 10733–10745, 2019. 

[7] S. Pourjafar, F. Sedaghati, H. Shayeghi, and M. Maalandish, 
“High step-up DC-DC converter with coupled inductor 
suitable for renewable applications,” IET Power Electron., vol. 
12, no. 1, pp. 92–101, 2019. 

[8] A. Jaya, F. D. Murdianto, E. Purwanto, and A. Rachmatdianto, 
“Ultra step up converter using fuzzy sugeno on HVDC 
application,” Proc. ICAITI 2019 - 2nd Int. Conf. Appl. Inf. 
Technol. Innov. Explor. Futur. Technol. Appl. Inf. Technol. 
Innov., pp. 82–87, 2019. 

[9] Ghabeli Sani, S. et al., “Design and implementation of a new 
high step ‐ up DC ‐ DC converter for renewable applications,” 
Int. J. Circ. Theor. Appl., no. 47, pp. 464-482, 2019. 

[10] P. Mohseni, S. H. Hosseini, M. Maalandish, and M. Sabahi, 
“Ultra-high step-up two-input DC-DC converter with lower 
switching losses,” IET Power Electron., vol. 12, no. 9, pp. 2201–
2213, 2019. 

[11] T. Jalilzadeh, N. Rostami, E. Babaei, and M. Maalandish, “Ultra-
step-up DC-DC converter with lowvoltage stress on devices,” 
IET Power Electron., vol. 12, no. 3, pp. 345–357, 2019. 

[12] V. Marzang, S. H. Hosseini, N. Rostami, P. Alavi, P. Mohseni, and 
S. M. Hashemzadeh, “A high step-up nonisolated DC-DC 
converter with flexible voltage gain,” IEEE Trans. Power 
Electron., vol. 35, no. 10, pp. 10489–10500, 2020. 

[13] B. Faridpak, M. Bayat, M. Nasiri, R. Samanbakhsh, and M. 
Farrokhifar, “Improved hybrid switched inductor/switched 
capacitor DC-DC converters,” IEEE Trans. Power Electron., vol. 
36, no. 3, pp. 3053–3062, 2021. 

[14] M. Meraj, M. S. Bhaskar, A. Iqbal, N. Al-Emadi, and S. Rahman, 
“Interleaved multilevel boost converter with minimal voltage 
multiplier components for high-voltage step-up applications,” 
IEEE Trans. Power Electron., vol. 35, no. 12, pp. 12816–12833, 
2020. 

[15] de Souza AF et al. “Switched capacitor DC-DC converters : A 
survey on the main topologies, design characteristic, and 
applications,” Energies, 14(8), 2231, 2021. 

[16] N. V. Kurdkandi et al., “Design and analysis of a switched-
capacitor DC-DC converter with variable conversion ratio,” Int. 
J. Circ. Theor. Appl., 48, 1638-1657, 2020. 

[17] Y. Sato, M. Uno, and H. Nagata, “Nonisolated multiport 
converters based on integration of PWM converter and phase-
shift switched capacitor converter,” in IEEE Transactions on 
Power Electronics, vol. 35, no. 1, pp. 455-470, Jan, 2020. 

https://mev.lipi.go.id/
https://doi.org/10.1109/TIE.2019.2902785
https://doi.org/10.1109/TIE.2019.2902785
https://doi.org/10.1109/TIE.2019.2902785
https://doi.org/10.1109/ACCESS.2019.2891625
https://doi.org/10.1109/ACCESS.2019.2891625
https://doi.org/10.1109/ACCESS.2019.2891625
https://doi.org/10.1049/joe.2018.8373
https://doi.org/10.1049/joe.2018.8373
https://doi.org/10.1049/joe.2018.8373
https://doi.org/10.1109/TEC.2018.2876454
https://doi.org/10.1109/TEC.2018.2876454
https://doi.org/10.1109/TEC.2018.2876454
https://doi.org/10.1109/TEC.2018.2876454
https://doi.org/10.1109/TIE.2019.2952821
https://doi.org/10.1109/TIE.2019.2952821
https://doi.org/10.1109/TIE.2019.2952821
https://doi.org/10.1109/TIE.2019.2952821
https://doi.org/10.1109/TPEL.2019.2897871
https://doi.org/10.1109/TPEL.2019.2897871
https://doi.org/10.1109/TPEL.2019.2897871
https://doi.org/10.1049/iet-pel.2018.5414
https://doi.org/10.1049/iet-pel.2018.5414
https://doi.org/10.1049/iet-pel.2018.5414
https://doi.org/10.1049/iet-pel.2018.5414
https://doi.org/10.1109/ICAITI48442.2019.8982157
https://doi.org/10.1109/ICAITI48442.2019.8982157
https://doi.org/10.1109/ICAITI48442.2019.8982157
https://doi.org/10.1109/ICAITI48442.2019.8982157
https://doi.org/10.1109/ICAITI48442.2019.8982157
https://doi.org/10.1002/cta.2593
https://doi.org/10.1002/cta.2593
https://doi.org/10.1002/cta.2593
https://doi.org/10.1049/iet-pel.2018.5924
https://doi.org/10.1049/iet-pel.2018.5924
https://doi.org/10.1049/iet-pel.2018.5924
https://doi.org/10.1049/iet-pel.2018.5924
https://doi.org/10.1049/iet-pel.2018.5356
https://doi.org/10.1049/iet-pel.2018.5356
https://doi.org/10.1049/iet-pel.2018.5356
https://doi.org/10.1109/TPEL.2020.2976829
https://doi.org/10.1109/TPEL.2020.2976829
https://doi.org/10.1109/TPEL.2020.2976829
https://doi.org/10.1109/TPEL.2020.2976829
https://doi.org/10.1109/TPEL.2020.3014278
https://doi.org/10.1109/TPEL.2020.3014278
https://doi.org/10.1109/TPEL.2020.3014278
https://doi.org/10.1109/TPEL.2020.3014278
https://doi.org/10.1109/TPEL.2020.2992602
https://doi.org/10.1109/TPEL.2020.2992602
https://doi.org/10.1109/TPEL.2020.2992602
https://doi.org/10.1109/TPEL.2020.2992602
https://doi.org/10.1109/TPEL.2020.2992602
https://doi.org/10.3390/en14082231
https://doi.org/10.3390/en14082231
https://doi.org/10.3390/en14082231
https://doi.org/10.1002/cta.2849
https://doi.org/10.1002/cta.2849
https://doi.org/10.1002/cta.2849
https://doi.org/10.1109/TPEL.2019.2912550
https://doi.org/10.1109/TPEL.2019.2912550
https://doi.org/10.1109/TPEL.2019.2912550
https://doi.org/10.1109/TPEL.2019.2912550


A. Jaya et al. / Journal of Mechatronics, Electrical Power, and Vehicular Technology 14 (2023) 80-86 

 

86 

[18] S. Folmer and R. Stala, “DC-DC high voltage gain switched 
capacitor converter with multilevel output voltage and zero-
voltage switching,” in IEEE Access, vol. 9, pp. 129692-129705 
2021. 

[19] A. Janabi and B. Wang, “Switched-capacitor voltage boost 
converter for electric and hybrid electric vehicle drives,” IEEE 

Trans. on Power Electron., vol. 35, no. 6, pp. 5615-5624, June, 
2020. 

[20] M. Maalandish, S. H. Hosseini, and T. Jalilzadeh, “High step-up 
dc / dc converter using switch- capacitor techniques and lower 
losses for renewable energy applications,” IET Power 
Electronics, 11, pp. 1718–1729, 2018. 

 
 

 

https://doi.org/10.1109/ACCESS.2021.3111546
https://doi.org/10.1109/ACCESS.2021.3111546
https://doi.org/10.1109/ACCESS.2021.3111546
https://doi.org/10.1109/ACCESS.2021.3111546
https://doi.org/10.1109/TPEL.2019.2949574
https://doi.org/10.1109/TPEL.2019.2949574
https://doi.org/10.1109/TPEL.2019.2949574
https://doi.org/10.1109/TPEL.2019.2949574
https://doi.org/10.1049/iet-pel.2017.0752
https://doi.org/10.1049/iet-pel.2017.0752
https://doi.org/10.1049/iet-pel.2017.0752
https://doi.org/10.1049/iet-pel.2017.0752

	Introduction
	II. Materials and Methods
	III. Results and Discussions
	IV. Conclusion
	Acknowledgements
	Declarations
	Author contribution
	Funding statement
	Competing interest
	Additional information 

	References