Microsoft Word - I. Zaslavski_11.doc Mathematical Problems of Computer Science 34, 2010. 33 Classical and Non-Classical Logic, Logical Methods for Electronic Circuits Testing I. D. Zaslavsky Institute for Informatics and Automation Problems Investigations in the domain of Mathematical Logic have been implemented in our Institute since 1960. Different works devoted to Constructive Mathematical Analysis and Constructive Logic were published over 1960-1990. In particular, a new logical system—Symmetric Constructive Logic, was created; systems of recursive realizability and logical-mathematical systems based on this logic were investigated in [1]. Researches on many-valued logics have been implemented since 1970 and in fuzzy logic since 1990.Theorems on compactness were proved for a large class of many-valued logics. Criteria for completeness and solvability were established for logical-mathematical systems based on three-valued logics [2]. General forms of algebraic representations for recursively enumerable fuzzy sets and for operators on such sets were created, connections between such algebraic systems and the corresponding logical- mathematical systems were established [3]. Formal logical languages for the representation of primitive recursive functions and primitive recursive string functions were created; connections between such languages were investigated [4]. Last years new logical systems, namely, fuzzy constructive and fuzzy symmetric constructive logics were created, logical calculi, formalizing the logical deductions in these logics, were investigated [5]. Logical-mathematical systems based on these logics, in particular, fuzzy formal arithmetics were defined. It may be supposed that investigations of such systems will give a possibility for constructing a mathematical theory of so called “fuzzy natural numbers”. The urgency of such theory was noted by N.N. Luzin and P.K. Rashevsky [6]. Since 1980 logical methods of electronic circuits testing, in particular, combinational and sequential circuits as well as memory circuits testing have been developed. The methods of circuit testability improvement by the insertion of new points of observability and controllability were developed; possibilities of optimization of the structure of circuits obtained by such a way were investigated [7]. The methods for the improvement of the structure of sequential circuits by the correction of delays in such circuits and testing of obtained delays were created [8]. New testing algorithms were developed for random access memories; the possibilities of minimization of corresponding tests were investigated. The minimal volume of some tests obtained by this way was established. New methods of dynamic faults testing in memory circuits were created [9]. The results of mentioned investigations are used in practical engineering. 34 References 1. Zaslavsky I.D. Symmetric Constructive Logic (in Russian). Publ. House of Acad. Sci. Armenia, 281p.,1978 2. Zaslavsky I.D. Formal Axiomatic Theories based on a Three-valued logic., Journal of Mathematical Sciences, vol.130, N 2, pp.4578-4597, 2005 3. Manukian S.N. Algebras of Recursively Enumerable Sets and their applications to Fuzzy Logic. Journal of Mathematical Sciences, vol.130, N 2, pp.4598-4606, 2005 4. Khachatrian M.H. On the Representation of Arithmetical and String Functions in Formal Languages. Transactions of IAPI of ANAS, vol. 27, pp. 37-53, 2006 5. Zaslavsky I.D. Fuzzy Constructive Logic (in Russian). Proceedings of Scientific Seminars of St.-Petersburg Dept. of Math. Inst. Steklov, vol. 358, pp. 130-152, 2008 6. Rashevsky P. K. On the dogma of natural numbers series. (in Russian), Uspekhi Math Nauk, vol. 28, N4(172), pp. 243-246, 1973 7. Vardanian V.A., Mirzoyan L.B. Method for Improvement of the Error Detection Ability of Concurrent Checkers. Proceedings of the International Conference “Computer Science and Information Technologies”, CSIT-01, pp. 349-353, 2001 8. Vardanian V.A. On Completely Robust Path Delay Fault testable Realization of Logic Functions., proceedings of the 14th IEEE VLSI Test Symposium, Princeton (USA), pp.302-307, 1996 9. Harutunyan G., Vardanian V.A., Zoryan Y. Minimal March Tests for Dynamic Faults in Random Access Memories. Journal of Electronic Testing, Theory and Applications, vol. 23, N1, pp. 65-74, 2007.