Microsoft Word - Paper 7.docx The Journal of Engineering Research (TJER), Vol. 13, No. 2 (2016) 172-186 Single CFTA Based Current-Mode Universal Biquad Filter S.V. Singhb, R.S. Tomar a, * and D.S. Chauhanc b Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, U.P. India *a Department of Electronics and Communication Engineering, Anand Engineering College, U.P. India c Department of Electrical Engineering, G.L.A. University Received 13 January 2016; Accepted 15 May 2016 Abstract: This paper introduces a new current-mode (CM) universal biquad filter structure with optimum number of active and passive elements. In the design, the proposed circuit uses a single active element namely, current follower trans-conductance amplifier (CFTA) and two grounded capacitors as passive elements. The main feature of the proposed circuit is that it can realize all five standard filtering functions such as low pass (LP), band pass (BP), high pass (HP), band stop (BS) and all pass (AP) responses across an explicit high impedance output terminal through the appropriate selection of three inputs. In addition, the same circuit is also capable to simultaneously realize three filtering functions (LP, BP and HP) by the use of single current input signal. Moreover, the proposed structure is suited for low voltage, low power operations and offers the feature of electronic tunability of pole-frequency and quality factor. Further to extend the utility of the proposed circuit block higher order current-mode filters are also realized through direct cascading. A detailed non-ideal and parasitic study is also included. The performance of the circuits has been examined using standard 0.25 μm CMOS parameters from TSMC. Keywords: Analog signal processing, Biquad-filters, Current-mode, Tunable. אאאאא ، ∗ ،א    אא       א   W א אא  א   Eא    F     א אא   ،א  Kא K     إن  א ،א א א   א אא  אKאא،،،،אאאא، אאאאאKאא אא،אא،אאאKאא אאאאאאא،אאאאאK אא   אא אא א    Kא  א א א ٢٥}٠ K  אאWةالفالتر الھوائي، القياسية معالجة اإلشارات ، ،א * Corresponding author’s email: r_tomar15@rediffmail.com S.V. Singh, R.S. Tomar and D.S. Chauhan 173 1. Introduction Analog circuit designers have paid a significant accent on the study and synthesis of current- mode (CM) continuous-time (CT) filter structures using variants of current conveyors suited for high performance analog signal processing applications (Toumazou et al. 1990; Kacar and Kuntman 2011). In the last few decades, circuit designers primarily focused on designing low cost, low supply voltage operable simple filter structures realizing all the standard filtering responses. These filter structures are termed as universal filters. Further, in the perspective of less chip area, cost reduction and lower average power consumption, the concluding remarks state that the circuit topology must be intended for an optimum use of active and passive elements in the biquad design (Satansup and Tangsrirat 2014). Another concern pertinent to the integrated circuit realization point of view is the electronic tuning aspects of filter parameters used for the fine adjustment of filter parameters against large manufacturing tolerances, which can also be used to compensate for deviations in the circuit performance parameters due to process tolerance, port parasitic, temperature drift, imperfections and aging etc. (Karybakas and Papazoglou 1999; Metin 2007). In the process, enormous papers on the synthesis of current- mode biquad filter circuits having one or more active elements are reported in the available literature (Keskin et al. 2006; Tomar et al. 2014a). The circuits reported in references are capable of realizing all the five standard filtering functions in current-mode either simultaneously (Cicekoglu 2001; Maheshwari and Khan 2004; Maheshwari and Khan 2005) or one at a time (Singh et al. 2014; Tomar et al. 2014b; Singh et al. 2012) or both way (Wang et al. 2001) without changing the circuit structure. Beside it, most of the circuit structure except few (Cicekoglu 2001; Wang et al. 2001) is resister less and canonical. However, all these circuits require more than one active element to realize filtering functions. With a view to being adaptable towards the simplicity, low cost, lower power consumption and space saving of the circuits, it is beneficial to design the biquad filter by the use of single active element and minimum number of passive elements. Therefore, we have focused here only on the single active element based current-mode filters from the available literature (Arsian et al. 2006; Prasad et al. 2009) for the comparative purpose and hence, the detail features of all single active elements based current-mode biquad filters are compared and summarized in Table 1. Some of the circuits among the current- mode filters based on single active element as discussed in Table 1 are configured as single input three output (SITO) (Mangkalakecree et al. 2009; Prasad et al. 2009) and remaining are configured as three input single output (TISO) (Arsian et al. 2006; Satansup et al. 2014). The SITO filters can realize at the most three filtering functions simultaneously whereas TISO filters can realize all five filtering functions but one function explicitly at a time. Unfortunately, most of the filter circuits (Arsian et al. 2006; Chang et al. 2007; Prasad et al. 2009; Tangsrirat 2010) and except (Satansup et al. 2012; Satansup et al. 2014) use at least three passive elements in the design. Beside this, some of the circuit configurations also employ floating passive elements (Arsian et al. 2006; Biolek et al. 2009; Chang et al. 2007; Prasad et al. 2009; Sirirat et al. 2010; Singh et al. 2013; Tangsrirat 2010; Yuce et al. 2004) and, hence, are not favorable for IC implementation. Moreover, few circuits require inverted current input signals and/or component matching constraints (Arsian et al. 2006; Chang et al. 2007; Chaturvedi and Maheswari 2011; Prasad et al. 2009; Sirirat et al. 2010; Satansup et al. 2014) too for the filtering functions realization. Furthermore, none of the CM filters endorsed in Table 1 can be configured as single input multiple output (SIMO) as well as multiple input single output (MISO) simultaneously from the same structure and are inept to operate at low supply voltages with lower power consumption. The current-mode filter structure proposed in this paper consists of single CFTA and two grounded capacitors and can realize LP, BP, HP, BS and AP filter functions in three input single output (TISO) and LP, BP, and HP filter functions in single input three output (SITO) configurations. The active element CFTA is slightly modified to get dual electronic tunability feature. The proposed structure is a resistor-less CMOS topology which neither requires inverted current input nor matching constraints for the realization of any filter function(s). With suitable impedance levels the proposed filter blocks are directly cascaded to obtain higher order filters ( Kacar and Kuntman 2011; Tomar et al. 2014a). The proposed circuits are evaluated through P-SPICE programs on cadence tools using 0.25μm TSMC CMOS parameters (Prommee et al. 2009). Table 1. Comparison among recent single active element based current-mode filters (Prasad et al. 2009; Arsian et al. 2006). Attributes Active Element Config. Passive Element s Functions Realized Floating Passive Elements Expli cit Outp uts Electronic Tunability of ω and Q Designed Pole Frequency Matching Condition required Inverted Input required Power Supply Power Consumed Reference (Prasad et al. 2009) DOCDTA SIMO 2R+2C LP,BP,HP 2R 1 YES NA YES NO ± 1 V NA (Chaturvedi et al. 2011) DVCC 2R+2C LP,BP,HP None None NO 9.7 MHz YES NO ± 2.5 V 4.9 mW (Yuce et al. 2004) CCII 2R+2C LP,BP 1R None NO NA NO NO NA NA (Herencsar et al. 2009) CCTA 2C+2R LP, BP, HP None 1 YES 1 MHz NO NO ± 2 V NA (Prasad et al. 2013) VDTA 1R+2C LP,BP,HP None 1 YES NA NO NO ± 1 V NA (Singh et al. 2013) MOCFTA 1R+2C LP,BP,HP 1R 2 YES 1.35 MHz NO NO ± 1.5 V 1.18 mW (Kacar et al. 2012) FDCCII 2R+2C LP,BP or HP,BP None 2 NO 10 MHz NO NO ± 1.3 V NA (Biolek et al. 2009) CDTA 1R+2C LP,BP,HP 1R 1 YES 10 MHz NO NO NA NA (Tangsrirat 2010) CFTA 1R+2C LP,BP,HP 1R 1 NO 159 KHz NO NO ± 3 V (Satansup et al. 2012) VDTA 2C LP,BP,HP None 1 YES 3.03 MHz NO NO ± 2 V NA (Mangkalakecree et al. 2009) CCCCTA 2C LP,BP,HP None 2 YES 572 KHz NO NO ± 1.5 V 1.42 mW (Satansup et al. 2014) VDTA MISO 2C LP, BP, HP, BS, AP None 1 YES 3 MHz NO YES ± 2 V 1 mW (Chang et al. 2007) CCCII 1R+2C LP, BP, HP, BS, AP 1R 1 YES 1 MHz YES YES ± 1.65 V NA (Kacar et al. 2012) FDCCII 2R+2C LP, BP, HP, BS, AP None None NO 1.59 MHz NO NO ± 3 V NA (Pandey and Paul 2011) DVCCTA 1R+2C LP, BP, HP, BS, AP None None NO 1.59 MHz NO NO ± 1.25 V NA (Sirirat et al. 2010) CFTA 1R+2C LP, BP, HP, BS, AP 1R 1 NO 1.12 MHz YES YES ± 3 V NA (Arsian et al. 2006) CCII 2R+2C LP, BP, HP, BS, AP 1C 1 NO NA YES NO NA NA Proposed CFTA Both SIMO/ MISO 2C LP, BP, HP, BS, AP None None YES 8 MHz NO NO ± 0.75 V 0.6 mW 174 Single C FT A B ased C urrent-M ode U niversal B iquad Filter S.V. Singh, R.S. Tomar and D.S. Chauhan 175 2. Basics of CFTA Since after its inception as current-mode active element and its terminal impedance suitability for current-mode analog signal processing applications, CFTA have been received consi- derable attention from the circuit designers (Satansup and Tangsrirat 2011; Tomar et al. 2014a; Singh et al. 2012; Singh and Maheswari 2013). The conventional CFTA can be further modified for additional advantage of dual electronic tunability. The modified CFTA with symbolic diagram is shown in Fig. 1 and can be described through the following set of equations Figure 1. Schematic symbol of modified CFTA. 22 11321 2 1 ,,,0 ZmX ZmXfZZZf VgI VgIIIIIV = ===== ± ± (1) Realization of the modified CFTA using CMOS is depicted in Fig. 2. The trans- conductance parameters gm1 and gm2 of the CMOS implemented CFTA (Tomar et al. 2014b; Singh et al. 2012) can be related with the biasing currents IS1 and IS2, respectively as: 11 Snm Ig β= and 22 Snm Ig β= (2) Where, )L/W(COXnn μ=β is the process parameter of NMOS transistors M8-M9, M15-M16 forming differential pairs at the trans- conductance stages of employed CFTA. 3. Proposed Current-Mode Filter The proposed current-mode biquad filter circuit as shown in Fig. 3 employs single CFTA as the active element and two grounded capacitors. The use of grounded capacitors is elegant for integrability (Bhusan and Newcomb 1967). The proposed circuit in Fig. 3 can be configured as either three input single output or single input three output configurations through appropriate selection of input and output current signal(s). The workability of the proposed current-mode filter structure can be described in following two different cases: 3.1 Case-I: TISO Filter Configuration If the proposed circuit in Fig. 3 is analyzed with three current input signals (Iin1, Iin2, Iin3), the expression for current output (Iout) can be obtained as: )s(D I)ggsCgsCC(sICgIsCC I 3in2m1m12m 2 212in12m1in 2 21 out +++−− = (3) Where, 211221 2)( mmm ggsCgCCssD ++= (4) Figure 2. CMOS implementation of CFTA. Single CFTA Based Current-Mode Universal Biquad Filter 176 Figure 3. Proposed current-mode biquad filter. It can be easily retrieved from equation (3) that different CM filtering responses can be obtained at current output Iout by selecting current inputs appropriately, as follows: • For Iin1 = Iin2 = Iin3 = Iin a non-inverted LP response is obtained. • For Iin1 = Iin and Iin2 = Iin3 = 0 an inverted HP response is obtained. • For Iin2 = Iin and Iin1 = Iin3 = 0 an inverted BP response is obtained. • For Iin2 = Iin3 = Iin and Iin1 = 0 a non-inverted BS response is obtained. • For Iin2 = 2Iin, Iin3 = Iin and Iin1 = 0 a non- inverted AP response is obtained. 3.2 Case-II: SITO Configuration With single current input (Iin2=Iin), the proposed circuit in Fig. 3 is capable to realize LP, BP and HP responses, simultaneously across three different current outputs ILP, IBP, IHP. The transfer functions for received filtering responses are as follows: )( 12 sD sCg I I m in BP −= (5) )( 21 sD gg I I mm in LP = (6) )( 2 21 sD sCC I I in HP = (7) From cases I and II, it can be remarked that proposed circuit in Fig. 3 can realize all the standard filter functions (LP, BP, HP, BS, and AP) across an explicit high impedance current output terminal by the appropriate selection of three current input signals. In addition, the same structure realizes LP, BP, HP responses, simultaneously by the use of single current input signal. Thus, the proposed circuit can be used as either TISO or SITO current-mode biquad filter without changing the structure and neither requires any component matching constraint nor inverted current input signal for any of the response realization. The filter’s characteristic parameters like pole frequency (ω), quality factor (Q) and band- width (BW) can be derived from the transfer function as: 21 21 CC gg mm=ω , 21 12 m m gC gC Q = , 2 2 C g BW m= (8) On substituting trans-conductance parameters gm1 and gm2 from equation (2) we find that equation (8) turns out to be: , )( 21 2/1 21 CC II SSnβω = 2/1 2 1 1 2       = S S I I C C Q (9) From equation (9), it is evident that the pole frequency can be tuned precisely, without distressing quality factor, if the ratio of biasing currents IS1 and IS2 is kept to be constant. The band width (BW) of the proposed filter circuit can also be expressed as: 2 2/1 2 )( C I BW Sn β = (10) Equation (10) shows that the BW can solely be controlled by only biasing current IS2. From equations (9) and (10), it is clearly seen that filter’s parameters ω and Q can be electronically adjusted by regulating the only biasing current IS1 without influencing BW. 4. Non-ideal and Parasitic Effects 4.1 Non-Ideal Analysis This section describes the non-ideal aspects of the proposed biquad structure. For this a non-ideal CFTA can be modeled through modified set of equations, as follows: S.V. Singh, R.S. Tomar and D.S. Chauhan 177 2222 1111321 ,,,0 ZmX ZmXfZZZf VgI VgIIIIIV γ γα ±= ±===== ± ± (11) Where, εα −= 1 with )1( <<εε represents the current tracking errors between f to Zi (i =1, 2, 3) terminals of CFTA and depends on the ratio of PMOS trans-conductance. With the use of identical PMOS transistors at the input stage, α may approach to unity. Similarly, γ1 and γ2 are the trans-conductance inaccuracies between Z1 to ± X1 and Z2 to ± X2 terminals, respectively. On considering these non-ideal factors of the CFTA and re-analyzing the proposed filter of Fig. 3, we get the similar denominator for each current output expressions as: 212112221 2)(' mmm ggsCgCCssD γαγαγ ++= (12) With involved non-idealities, the modified ω and Q are obtained from equation (12) as: 21 2121 CC gg mmγαγω = , 212 121 m m gC gC Q αγ γ = (13) From equation (13), it can be seen that minor deviations may occur in ω and Q due to involved non-ideal factors. Though these slight deviations can be ignored as non-ideal factors α, γ1 and γ2 are imminent to one at operational frequency. However, to what an extent the filter’s characteristic may actually be deviated due to possible changes in the design can be visualized by sensitivity coefficients which are as follows: , 2 1 2121 ,,,, =ω γγα mm ggS 2 1 S 21 C,C −=ω (l4) 2 1 1,21 , =Q gC mS γ , 2 1 SQ g,C, 2m12 −=γ (15) Hence, we can state that the entire sensitivity coefficients are within ‘half’ in magnitude. 4.2 Parasitic Effects In this section, the performance of the proposed current-mode filter circuit in the presence of diverse parasitic impedance effects of the CFTA are to be considered. A practical CFTA, similar to any other active including various ports parasitic is shown in Fig. 4. These are port Z1, Z2 and Z3 parasitic in the form of RZ1//CZ1, RZ2//CZ2 and RZ3//CZ3 respectively, and ports X1, X2 parasitic in the form of RX1//CX1, RX2//CX2 and port ‘f’ parasitic in the form of Rf. In Fig. 4 the X2 port parasitic RX2 and CX2 appear between the high impedance terminal and ground. To abolish their effect, the CFTA should be well designed to comprise a very low port parasitic Rf. Ideally, the value of Rf is zero and terminal ‘f’ is virtually grounded. Since these parasitic impedances are connected between true ground and virtual ground, these are, therefore, almost ineffective (Singh et al. 2012). The external capacitances C1 and C2 can be chosen to be much greater than the parasitic capacitances at the Z1, Z2, X1 and X2 terminals of CFTA i.e. C1, C2>> CZ1, CZ2, CX1, CX2. Figure 4. Modified CFTA with port parasitic. To visualize the effects of various parasitic impedances on the performance of the proposed current-mode filter circuit, the proposed circuit is reanalyzed in the presence of various ports parasitic of CFTA. For this purpose, current- mode BP response is taken in to consideration. By taking the above discussion and parasitic effects into account and on further reanalyzing the proposed current-mode filter, we get following expression for the BP filter at Iout. ][][ ) 1 ( 21 21 2 22 112 2 M CC gg L C g ss RC s C g I I mmm Z m in BP ++ + = (16) Where, 121 2 2 11 1 ZmCm RgC C Rg L ++= (17) and 12111 11 1 ZCmmZm RRggRg M ++= (18) With, RC = RZ2 // RX1 (19) And hence, filter parameters in equations (8) to (10) are changed to: Single CFTA Based Current-Mode Universal Biquad Filter 178 Mωω =* (20) ][][ 2 2 * L Q L C g Q m ωω ==      (21) and         =         = L M Q L M Cg Cg Q m m 12 21* (22) In equations (16)-(22), undesirable factors are yielded due to various ports parasitic of CFTA. By considering C1=C2, and gm1=gm2 in the design, these undesirable factors can be eliminated or minimized and hence, the proposed filter may approach towards ideal response, if we choose the design criterion given in equation (23). , , 1 1 1 ZR C >>ω (23) 5. Simulation Results In this section, the current-mode universal filter in Fig. 3 has been simulated using PSPICE programs to authenticate the theoretical expectations. The employed CFTA as given in Fig. 1 was implemented using standard CMOS technology (TSMC 0.25µm process parameters) as shown in Fig. 2. The dimensions of MOS transistors were obtained as summarized in Table 2. The circuit was biased with power supply VDD = -VSS= 0.75V and VBB = -0.32V and designed to realize biquadratic characteristics with f = 8 MHz at Q = 1. In design, the active and passive components value were determined as IS1 = IS2 = 40 µA and C1 = C2 = 10 pF, which resulted in total average power consumption of about 0.6 mW. Fig. 5 shows the simulated and ideal current-gain responses of BP, LP and HP filter functions for the SITO configuration of the proposed current-mode filter circuit. Similarly, for the TISO configuration the simulated and ideal current-gain and phase responses for LP, HP, BP, BS and AP filtering functions are shown in Fig. 6. In Fig. 5 and Fig. 6 the difference between ideal and simulated results is clearly visible along with distortion (spike) beyond 670 MHz or so. Which is obviously due to involved non ideal factors and parasitic effects dominating at higher frequencies. However, at working frequencies these non ideal factors were found to be unified as discussed in section 4. For different filtering responses the pole frequency was measured as 7.94 MHz, which deviated only by 0.75% from the numerical designed value of 8 MHz. To show the electronic tuning aspects of the proposed current-mode filter, the circuit is further simulated to obtain various BP responses at different sets of IS1 and IS2 in such a way so that IS1=IS2 = 5µA, 10µA, 30µA, 150µA, which result in to the pole frequency variation as 1.25 MHz, 3.22 MHz, 7.25 MHz and 12.03 MHz, respectively, at constant Q = 1. The simulated result showing the pole frequency tuning aspect independent of Q is shown in Fig. 7. Similarly, the simulation results showing the tuning feature of Q independent of f0 for the SITO configuration is also shown in Fig. 8, which were obtained by maintaining the product of IS1 and IS2 to be a constant as (IS1 =10µA, IS2 =160 µA), (IS1 =16µA, IS2 =100 µA), (IS1 =32µA, IS2 =50 µA), and (IS1 =64µA, IS2 =25 µA) respectively. In Fig. 9, the time-domain analysis of BP filter (SITO configuration) is displayed, which was obtained by applying a sinusoidal input of 80µA peak to peak at 7.94 MHz. Similarly, the time- domain analysis of LP filtering function (TISO configuration) is also shown in Fig. 10, which was obtained by applying a sinusoidal input of 80µA peak to peak at 200 MHz. Next, the THDs of the LP response of the proposed circuit were also measured by applying a current input sinusoidal signal of peak amplitude of 40 µA and having varying frequency from 50 KHz to 900 KHz. It can be observed that the THD figures are adequate and not more than 3%, causes the output signal is not distorted significantly for an applied input signal of varying frequency as shown in Fig. 11. To observe the effect of passive component mismatching on the filter’s performance, Monte-Carlo analysis has been performed for 100 samples. For this, the BP filter of SITO configuration was simulated by selecting the values of capacitors C1 and C2 with 5% Gaussian deviation. The statistical results in the form of plots are depicted in Fig. 12, the simulated mean, median and standard deviations were respectively, 8.24 MHz, 8.22 MHz and 164.66 KHz, which reveal that with respect to the simulated pole frequency of 7.94, the proposed filter is less sensitive to the change in capacitors value and thus offers reasonable passive sensitivity. 2 1 1 1<< m Zg R 2 1 1<< m Cg R S.V. Singh, R.S. Tomar and D.S. Chauhan 179 Figure 5. Current-gain responses of LP, HP and BP filters for SITO configuration of the proposed filter in Figure 3. (a) (b) (c) Single CFTA Based Current-Mode Universal Biquad Filter 180 (d) (e) Figure 6. Simulated and Ideal Current-gain and phase responses for TISO configuration of the proposed filter in Figure 3 (a) LP (b) HP (c) BP (d) BS and (e) AP filter functions. Figure 7. Simulated BP responses of SITO configuration of the proposed filter in Figure 3, showing variation in pole frequency, and keeping Q = 1. S.V. Singh, R.S. Tomar and D.S. Chauhan 181 Figure 8. Simulated BP responses of SITO configuration showing variation in Q, by keeping pole frequency at 7.94 MHz. Figure 9.Time domain response for BP filter of SITO configuration of the proposed filter in Figure 3. Figure 10. Time domain response for LP filter of TISO configuration of the proposed filter in Figure 3. Single CFTA Based Current-Mode Universal Biquad Filter 182 Figure 11. THD performance of LP response of the SITO configuration for a sinusoidal current input of amplitude 40μA, for a frequency range 50 to 900 KHz. Figure 12. Statistical results of Monte-Carlo analysis for the BP response of SITO configuration of the proposed circuit with 5% deviation in capacitor values. 6. Application: Higher Order Filters To further support the proposed CM filter topology in Fig. 3, it is used as a general purpose structure for realizing higher order current-mode filter (Kacar and Kuntman 2011; Tomar et al. 2014a). For example, nth order (where n = even) BP filter and HP filter are shown in Fig. 13 and Fig. 14, which are implemented through direct cascading (Maheshwari et al. 2004) of m = n/2, similar proposed blocks without using any impedance matching or coupling. Direct cascading facilitates with no lower cut-off frequency limitations and circuit can operate from low to High frequency range. Simulations are next performed for the 4th, 6th and 8th order fourth-order filter to illustrate the frequency domain performance of the circuit and corresponding results are shown in Fig. 15 and Fig. 16. In this design, the component values for each of the filter block (1, 2…..m) were chosen as ISm= 40 µA and C1m = C2m = 10 pF. The voltage supply rails were used as VDD = -VSS = 0.75 V with a bias VBB = - 0.32 V. From different simulation results, it is evident that the higher order circuits realized through direct cascading are attractive choice and operated efficiently at low supply rails with least power consumption. S.V. Singh, R.S. Tomar and D.S. Chauhan 183 Figure 13. Nth - order band pass (BP) filter, derived through direct cascading of the proposed circuit blocks in Figure 3. Figure 14. Nth - order high pass (HP) filter, derived through direct cascading of the proposed circuit blocks in Figure 3. Table 2. Dimensions of MOS transistors in Figure 2. MOS Transistors Dimensions W (μm)/L (μm) M1, M2 1/0.25 M3-M7, M10-M14, M17-M21 3/0.25 M8,M9, M15, M16 15/0.25 M22-M27, M29-M33, M35- M41 5/0.25 M24 10/0.25 M28, M34 4.2/0.25 Single CFTA Based Current-Mode Universal Biquad Filter 184 Figure 15. Current-gain and corresponding phase response for the Nth-order (N = 2, 4, 6, 8) BP response of Figure 13. Figure 16. Current-gain and corresponding phase response for the Nth-order (N = 2, 4, 6, 8), HP response of Figure 14. S.V. Singh, R.S. Tomar and D.S. Chauhan 185 7. Conclusion In this paper, a single CFTA and two grounded capacitors based current-mode biquad filter is proposed and verified using simulation results. In addition, non ideal aspects and parasitic impedance effects of the CFTA were also considered in details. The simulation results agree quite well with the theoretical expectations. The proposed circuit has a number of noticeable advantages as discussed below. The proposed circuit shows versatility by realizing LP, BP, HP, BS and AP functions in TISO as well as LP, BP, HP responses as the SITO configuration. The use of a single active element makes the circuit topology simpler. Moreover, the use of two grounded capacitors provides a canonical structure, leads to the option for integrated circuit implementation and for parasitic reduction. Moreover, the circuit neither requires inverted current input(s) nor any component matching conditions for response realization, and thus eliminates the need of complex external circuitry. Orthogonal control of Q and ω via biasing currents suited for practical adjustments in music and speech synthesis. The proposed circuit is a low voltage and low power structure, hence it is suited for battery operated systems. Expansion possibility of the proposed circuit for higher order realization through direct cascading validates its usefulness for analog signal processing. The CMOS compatibility of the circuit is fully suited for low cost integrated circuit implementation. Moreover, the circuit offer low active and passive sensitivity performance. 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