teee-68_er.pdf Analysis of loss distribution of Conventional Boost, Z-source and Y-source Converters for wide power and voltage range Brwene Gadalla(1), Erik Schaltz(1), Member IEEE, Yam Siwakoti(2), Member IEEE, Frede Blaabjerg(1), Fellow, IEEE Department of Energy Technology, Aalborg University(1) Aalborg 9220, Denmark Department of Electrical, Mechanical and Mechatronic Systems, University of Technology Sydney(2) Sydney, Australia bag@et.aau.dk, esc@et.aau.dk, Yam.Siwakoti@uts.edu.au, fbl@et.aau.dk Abstract— Boost converters are needed in many applica- tions which require the output voltage to be higher than the input voltage. Recently, boost type converters have been applied for industrial applications, and hence it has become an interesting topic of research. Many researchers proposed different impedance source converters with their unique advantages as having a high voltage gain in a small range of duty cycle ratio. However, the thermal behaviour of the semiconductor devices and passive elements in the impedance source converter is an important issue from a reliability point of view and it has not been investigated yet. Therefore, this paper presents a comparison between the conventional boost, the Z-source, and the Y-source convert- ers based on a thermal evaluation of the semiconductors. In addition, the three topologies are also compared with respect to their efficiency. In this study the results show that the boost converter has higher efficiency than the Z- source and Y-source converter for these specific voltage gain of 2 and 4. The operational principle, mathematical derivations, simulation results and final comparisons are presented in this paper. Key words- boost converter; Z-source converter; Y-source converter; winding losses; core losses; gain; thermal design; reliability I. INTRODUCTION B OOST type converters are essentially needed for many re-newable energy applications such as Photo Voltaic (PV), Wind Turbine (WT) and automotive applications (electric and hybrid vehicles) as these often have lower input voltage than the required load voltage. In conventional boost converters, the demanded voltage gain normally requires higher duty cycle (sometimes close to unity), which leads to high conduction losses, higher voltage and current stresses on the switching devices. However, the aforementioned stressor factors may critically affect the reliability and the lifetime of the power electronic components. According to a review based on con- dition monitoring for device reliability in power electronic systems presented in [1], semiconductor and soldering failures in device modules are sharing totally 34% of converter system failures in Fig. 1. In today’s perspective toward the reliability assessment of power electronic components and systems, three main aspects should be considered as shown in Fig. 2 [2]. PCB 26% Capacitors 30%Solder 13% Semiconductors 21% Connectors 3% Others 7% Fig. 1. Ranking and failure distrbution of power electronic components in power converters [1]. The design and verification aspect could be related to cover the aforementioned shortcomings in the conventional boost converter shown in Fig. 3. Both Z-source and Y-source as shown in Fig. 4 and Fig.5 converters were proposed by the researchers as impedance source network converters to compromise the high voltage gain with small duty cycle ratio. Due to their flexibility for a wide voltage ranges and power conversions (DC-DC, DC-AC, AC-AC, and DC-AC) [8], various types of impedance source networks were reported as a solution to overcome the limitations of the voltage source inverter VSI, current source inverter CSI and some of the conventional uni/bi - directional converters [9]. Moreover, an important advantage of the impedance net- TRANSACTIONS ON ENVIRONMENT AND ELECTRICAL ENGINEERING ISSN 2450-5730 Vol , No (201 ) © z Power electronics reliability Control and m onitoring Intelligent control Condition m onitoring D es ig n an d ve rif ic at io n D es ig n fo r re lia bi lit y Ro bu stn es s va lid at io n Analytical physics Physics of Failure (PoF) Component physics Fig. 2. Aspects in power electronics reliability assessment [2]. works is the small duty cycle ratio, which reduces the losses of the switch [10]. Therefore, many new topologies are proposed with each being claimed to have improved performances [8]. At present, a collective investigation of some of the existing boosting converters has not been initiated especially with reference to their thermal and reliability issues. Furthermore, an investigation of the Y-source converter from the point of view of thermal performance at high power ratings has not been reported as well. The junction temperature is one of the important factors that is affecting the thermal performance of the converter, and also the reliability [11]. In this paper the conventional boost, Z-source and Y-source converters are compared in terms of their efficiencies and junc- tion temperature with respect to a wide power range, different voltage gains and assuming a constant ambient temperature. Moreover, calculations of all the relevant losses (e.g switching and conduction losses) of the power switching devices during the operation is also considered in the comparison [12]. This paper conducts a comprehensive investigation of the mapping of the losses of the power converter. Section II is focusing on the theory of operation and design of each converter. Section III describes the evaluation of the power losses and thermal performance of the three converters. Section IV describes the simulation results and discuss the results. Finally, the conclusion is given in section V. II. CONVERTER DESIGN AND THEORY OF OPERATION In this section the theory of operation of the converters and design formulas are presented. A. Conventional boost converter A boost converter is a step-up converter converting the voltage from low input voltage to higher voltage requiring a duty cycle (0 0.5). The two modes of operation are as following: a) During the on-state: the switch is closed, the current flows through the inductor and store the energy in a magnetic field. b) During the off-state: the switch is open, the current passed will be reduced as the voltage across the inductor is reversed and the magnetic field previously created will decrease to maintain the current flow to the load and the current through the diode will charge the capacitor giving a higher voltage. The input/output voltage relationship is expressed in (1) as: Vout = Vin 1 − D (1) where Vout is the output voltage, Vin is the input voltage and D is the duty cycle needed for the required voltage gain [13]. B. Z-source converter The Z-source converter (ZSC) is a very convenient topol- ogy in many alternative energy sources and other different applications [3, 4]. The ZSC has the capability of ideally giving an output voltage range from zero to infinity regardless of the input voltage. The Z-Source converter circuit, and its two modes of operation are shown Fig.4. It consists of two inductors (L1, L2) and two capacitors (C1, C2) connected in X shape to be coupled to the dc voltage source. The ZSC can produce a required dc output voltage regardless of the input dc source voltage. The two modes of operation are as the following: a) In the on-state: the switch is closed and the impedance capacitors (C1, C2) release energy to the inductors (L1, L2) and then the voltage source and the load will disconnect the Z-source network due to the turn off of the diodes (D1, D2). The major concern is the large conduction current passing through the switch during the on state, which may decrease the converter efficiency. b) In the off-state: the switch is opened and the input voltage will supply energy to the load through the two inductors as well as add energy to the two capacitors to compensate the energy lost during the on state. The input/output voltage relationship is expressed in (2) as: Vout = Vin 1 − 2D (2) where Vout is the output voltage, Vin is the input voltage and D is the duty cycle needed for the required voltage gain [3, 4]. C. Y-source converter The Y-source converter is a promising topology for higher voltage gain in a small duty ratio and has a very wide range L1 Cout D1 RL SW L1 (a) (b) (c) vin Cout RLSW L1 Cout D1 RL vinvin + vout _ iin iL iout Fig. 3. a) Boost converter Circuit topology. b) Equivalent circuit for on state. c) Equivalent circuit for off state [13]. L1 C2 C1 SW L2 L1 C1 L2 D1 Cout RLvin (a) (b) (c) RLCout L1 C2C1 L2 D1 Cout RLvin SW D2 D2 C2+ vout _ iin iL iC1 iout Fig. 4. a) Z-Source converter Circuit topology. b) Equivalent circuit for on state. c) Equivalent circuit for off state [3, 4]. vin D1 Cout N1 N3 D2 N2 C1 SW Cout N1 N3 N2 C1 Cout N1 N3 N2 C1 RL RL (b)(a) (c) vin SW + vout _ iin iout vinRL iN2 LM1 iM1 Fig. 5. a) Y-source converter Circuit topology. b) Equivalent circuit for on state. c) Equivalent circuit for off state [5–7]. of adjusting the voltage gain [5–7]. The range of duty cycle in the Y-source is narrower than the Z-source and the boost converter. Fig. 5 shows the Y-source impedance network and its two modes of operation. It is realized by a three-winding coupled inductor (N1, N2, and N3) for introducing the high boost at a small duty ratio for the SW. It has an active switch SW, two diodes (D1, D2), a capacitor C1, and the windings of the coupled inductor are connected directly to SW and D1, to ensure a very small leakage inductance at its winding terminals. The two modes of operation are as the following: a) In the on-state: the switch is closed, D1 and D2 are off causing the capacitor C1 to charge the magnetizing inductor of the coupled transformer and capacitor C2 discharge to power the load. b) In the off-state: the switch is opened, D1 starts to conduct causing the input voltage to recharge the capacitor C1 and the energy from the supply and the transformer will also flow to the load. When D2 starts conducting, it recharges C2 and the load is to be continuously powered. The input/output voltage relationship is expressed in (3) as: Vout = Vin 1 − KD (3) where Vout is the output voltage, Vin is the input voltage, D is the duty cycle [5–7] and K is the winding factor. The winding factor K is calculated according to the turns ratio of the three-winding coupled inductor and it is expressed in (4) as: K = N1 + N3 N3 − N2 (4) where (N1 : N2 : N3) are the winding ratios of the coupled inductor. A comparison between the inductors, the capacitors design, voltage and current ripples for the three converters is shown in Table I. TABLE I. Component design for the Boost, Z-source and Y-source converters Components Boost Z-source Y-source Current ripple across inductor 2 20%0. outL in LI P I V 20%L LI I 20%L MI I Voltage ripple across capacitor 2% outC out V V 2%C outV V 2% outC outV V Inductor equation in L s DV L I f 1 2 c L T V L L L I 1.056 2 3 0.29210 , cN L lik c N lik N A L A N L L L L L Capacitor equation out max out s out I D C f V 1 2 % L c c T C V I V C C out out l s out V D C R f V ST o 1 2 s o d 1 P C 1 2% 1 f 1 k D VD out out l s out V D C R f V IM: Magnetizing current, LN: Nominal inductance, Llik: leakage inductance, To = DT= D/fsw III. EVALUATION OF POWER LOSSES AND THERMAL PERFORMANCE In this section, the formulas for calculating the relevant power losses are presented. PLECS toolbox is used for the three converter analysis. The parameters selected for each converter are compared according to the passive components counts and their voltage and current ripples are as shown in Table I. The same for the switching devices, which are designed according to each converter requirements for the voltage and current ratings for a realistic comparison. A. Switching and conduction losses calculations Switching losses occur when the device is transitioning from the blocking state to the conducting state and vice-versa. This interval is characterized by a significant voltage across its terminals and a significant current through it. The energy dissipated in each transition needs to be multiplied by the switching frequency to obtain the switching losses; The switching losses Psw are expressed in (5) as: Psw = (Eon + Eoff ) × fsw (5) where Eon and Eoff are the energy losses during turn on and turn off of the switch, fsw is the switching frequency. Conduction losses occur when the device is in full conduc- tion mode. These losses are in direct relationship with the duty cycle. The average conduction losses Pcond are expressed in (6) as: Pavg.cond = 1 T ∫ T 0 [vce(t) × ice(t)] dt (6) where vce is the on state voltage, an ice is the on state current. The time period T is as given in (7): T = 1 fsw (7) where fsw is inversely proportional to the time period T . B. Capacitor ESR losses calculations The Capacitor Equivalent Series Resistance (ESR) is the value of the resistance, which is equal to the total effect of a large set of energy loss mechanisms occurring under the operating conditions where it can be a parameter to measure the capacitor losses. The capacitor losses are expressed in (8) as: Pcap.loss = I 2 cap. × ESR (8) where Icap. is the rms current passing through the capacitor, and ESR is the equivalent series resistance measuring the effect of the losses dissipated in the capacitor. C. Winding and core losses calculations According to the Steinmetz’s equation, which is a physics based equation used to calculate the core loss of magnetic materials due to hysteresis. The core losses are expressed in (9): Pv = kf αB̂β (9) where B̂ is the peak flux density excitation with fre- quency f, Pv is the time-average power loss per unit volume, and(α, β, k) are the material parameters found by curve fitting. The improved generalized Steinmetz’s equation is expressed in (10): Pv = 1 T ∫ T 0 ki ∣∣∣∣dBdt ∣∣∣∣ α ( ΔBβ−α ) dt (10) where ΔB is the flux density from peak to peak and in (11): ki = k (2π) α−1 ∫ 2π 0 |cosθ|α × 2β−αdθ (11) where θ is the angle of the sinusoidal waveform simulated. The copper losses in the winding describe the energy dissipated by the resistance in the wire used in the coil. It is divided in to 2 types (DC and AC winding loss). The DC winding losses can be calculated in (12) as: PDC = I 2 av × RDC (12) where (PDC ) is the DC copper losses in the winding, Iav is the average current passing through the wire, and RDC is the DC resistance of the wire. AC copper losses can be significant for large current ripple and for higher frequency. It can be calculated through the skin effect, where the current density is an exponentially decaying function of the distance into the wire, with the characteristic length δ is known as the skin depth in (13) as: δ = 7.5√ fs (13) where δ is the skin depth in cm, and fs is the switching frequency which in our design is 20 kHz. In order to calculate the AC resistance RAC , the thickness h of the wire should be known since it is a function of the dc resistance RDC which can be calculated in (14): RAC = h δ × RDC (14) where h is the thickness of the wire in cm. The AC winding losses can be calculated as given in (15) as: PAC = I 2 AC−rms × RAC (15) where PAC is the AC winding loss, IAC−rms is AC ripple rms current passing through the wire, and RAC is the AC winding resistance. D. Magnetic core design calculations In this section, the magnetic core design [14] is illustrated through the following steps: 1) In order to select a proper core size, the DC current IDC in Ampere and the inductance L in mili Henry required with DC bias should be known to select the core from the core selector chart according to the calculated value (mH.A2) in (16): LI2DC = value (16) A high flux 58337 core [14] was selected for the 3 convert- ers in order to have fair comparison from an efficiency point of view for the voltage gain of 2. 2) Inductance, core size and permeability are now known, then calculating the number of turns by determining the minimum inductance factor ALmin by using the worst case negative tolerance (generally −8%) given in the core data sheet in (17) and (18) Almin = Al − 0.08Al (17) N = √ L × 103 Almin (18) where Al is the inductance factor found in the core data sheet (nH/T2), Almin is the minimum inductance factor (nH/T 2), and L is the inductance in (μH). 3) Choosing the suitable wire size according to rated power and calculated number of turns (N), is the last step before calculating the DC resistance according to the wire size with window fill assumed to be 40% in (19) as: CA = Wf × WA N (19) where CA is the wire area, Wf in the window fill, and N is the no. of turns. 4) The DC resistance can be estimated after knowing the winding factor of the core, wire gauge (AWG), and the number of turns. The DC resistance can be calculated in (20) as: RDC = MLT × N × Ω/Length (20) where MLT is the mean length per turn, and Ω/Length is the resistance per meter. Furthermore, in the voltage gain of 4 METGLAS power-lite C-core [15] is used and Kg-method is applied [16]. IV. SIMULATION RESULTS AND DISCUSSION In this section, different power loadings for the voltage gain equal to 2 and 4 are presented in order to demonstrate a fair comparison between the 3 topologies with respect to the thermal performance and the losses (switching, conduction, capacitor ESR losses, core and winding losses) for calculat- ing the efficiency of each converter. Thermal and efficiency investigation are presented in a separate subsection. Table II summarizes the specifications and the requirements used in the simulation results. The design specifications for each voltage gain are given separately for each topology as it can be seen from Table III, which summarize the semiconductor devices average current and voltage ratings used in the 3 converters. These ratings are based on the required voltage gain for each converter separately. A. Junction temperature investigation of the switch under different power loading For each semiconductor a heat sink has been designed. A maximum junction temperature of 125 ◦C has been used a design constraint. The estimation of the junction temperature TABLE II. Common specifications and simulation parameters for the Boost, Z-source and Y-source converters Simulation parameters Boost Z-source Y-source Gain 2 Duty cycle D 0.5 0.25 0.167 No. of turns 64 55 ( 32:32:64 ) Switch RMS current 71 A 100 A 120 A Gain 4 Duty cycle D 0.75 0.375 0.25 No. of turns 27 30 ( 7:7:14 ) Switch RMS current 171 A 237 A 346 A * Input voltage for gain 4 Common converter specifications for gain 2 and 4 Maximum Power rating 20 kW Input voltage Vin 200 V \ 100 V * Output voltage Vout 400 V Switching frequency fs 20 kHz Resistive load Rl Maximum junction temperature Tj-max. 125 °C TABLE III. Semiconductor devices selection for the three converters and their different voltage gains. Converter Semiconductor devices Gain 2 Gain 4 B oo st IGBT (IXXX200N60C3) 600 V and 200 A (MG06600WB-BN4MM) 600 V and 600 A Diode (D1) (IDW100E60) 600V and 100 A (DB2F200N/P6S) 600V and 200 A Z -s ou rc e IGBT (MG06400D-BN4MM) 600 V and 400 A (MG06600WB-BN4MM) 600V and 600 A Diode (D1) (DS1F300N6S ) 600V and 300 A (SD600N/R Series) 600V and 600 A Diode (D2) (DS1F300N6S ) 600V and 300 A (DS1F300N6S) 600V and 300 A Y -s ou rc e IGBT (MG06600WB-BN4MM) 600V and 600 A (MG06600WB-BN4MM) 600V and 600 A Diode (D1) (VSK.9112 ) 1200V and 100A (SKN 501/12 Semikron) 1200V and 720 A Diode (D2) (DS1F300N6S ) 600V and 300 A (DS1F300N6S) 600V and 300 A of the switches are done according to the thermal model and the mapped losses using the PLECS toolbox. The estimation of the junction temperatures are different for the 3 topologies, since the desired thermal resistance of the heat sink is not the exact calculated value found in the manufactured heat sinks. 1 5 10 15 20 0 20 40 60 80 100 120 130 140 Ju nc tio n te m pe ra tu re T j ( °C ) Load power (kW) Boost Z-source Y-source At ambient temperature Ta= 25 °C Fig. 6. Junction temperature variation of the switch at different power loading and using a voltage gain of 2. In this case, the load power is varying from 1 to 20 kW, and a constant ambient temperature is assumed which is 25 ◦C. The junction temperature variation results of the compared 1 5 10 15 20 0 20 40 60 80 100 120 130 140 Ju nc tio n te m pe ra tu re T j ( °C ) Load power (kW) Boost Z-source Y-source At ambient temperature Ta= 25 °C Fig. 7. Junction temperature variation of the switch at different power loading and using a voltage gain of 4. topologies are shown in Fig. 6 for voltage gain of 2. Fig. 7 shows the junction temperature variation at different loading power for voltage gain of 4. B. Efficiency investigation under different power loading In this subsection the efficiency is calculated according to the total power losses for each converter as listed in the beginning of section IV using the same conditions listed in TABLE IV. Distribution of the different losses for the Boost converter at 20 kW load power and two different voltage gain. Voltage gain Boost converter G ai n 2 Total loss: 1.7 % G ai n 4 Total loss: 3.9 % Switching loss 83 W 26% Conduction loss 169 W 53% Capacitor ESR loss 1.5 W 1% Core loss 3.3 W 1% DC winding loss 61 W 19% AC winding loss 1 W 0% Switching loss Conduction loss Capacitor ESR loss Core loss DC winding loss AC winding loss Switching loss 340 W 44% Conduction loss 231 W 30% Capacitor ESR loss 3 W 0% Core loss 63 W 8% DC winding loss 135 W 18% AC winding loss 2 W 0% TABLE V. Distribution of the different losses for the Z-source converter at 20 kW load power and two different voltage gain. Voltage gain Z-source converter G ai n 2 Total loss: 3.3 % G ai n 4 Total loss: 5 % Switching loss 335 W 52% Conduction loss 198 W 31% Capacitor ESR loss 3.1 W 0% Core loss 7.4 W 1% DC winding loss 103 W 16% AC winding loss 1.4 W 0% Switching loss Conduction loss Capacitor ESR loss Core loss DC winding loss AC winding loss Switching loss 321 W 31% Conduction loss 324 W 32% Capacitor ESR loss 23.7 W 2% Core loss 145 W 14% DC winding loss 204 W 20% AC winding loss 2 W 0% TABLE VI. Distribution of the different losses for the Y-source converter at 20 kW load power and two different voltage gain. Voltage gain Y-source converter G ai n 2 Total loss: 4.4 % G ai n 4 Total loss: 6.3 % Switching loss 474 W 51% Conduction loss 228 W 24% Capacitor ESR loss 12 W 1% Core loss 18 W 2% DC winding loss 200 W 22% AC winding loss 1.64 W 0% Switching loss Conduction loss Capacitor ESR loss Core loss DC winding loss AC winding loss Switching loss 682 W 42% Conduction loss 218 W 13% Capacitor ESR loss 42 W 3% Core loss 329 W 20% DC winding loss 340 W 21% AC winding loss 19.5 W 1% Table II. The results in Fig. 8 show that the boost converter has the highest efficiency of 98% compared with the Y-source converter of 96% and the Z-source converter of 96.7% at 20 kW loading power. The measured efficiencies from low power loading (1 kW) to higher power loading (20 kW) is also shown in 8. the same analysis is repeated for voltage gain of 4 as shown in 9. 1 5 10 15 20 87 90 92 9596 9798 99100 E ff ie ci en y (% ) Load power (kW) Boost Z-source Y-source At ambient temperature Ta= 25 °C Fig. 8. The efficiency at different loading power and using a volatge gain of 2. C. Total losses at 20 kW power loading In this section a better understanding is given for the efficiency and loss mapping. Six pie charts are presented in Tables IV, V, and VI for the same power loading 20 kW and different voltages gain (2 and 4). The total loss listed in Table IV, V, and VI were calculated from the total power loss of each converter by measuring the total efficiency as summarized in 1 5 10 15 20 80 82 85 87 90 92 94 96 98 100 E ff ie ci en y (% ) Load power (kW) Boost Z-source Y-source At ambient temperature Ta= 25 °C Fig. 9. The efficiency at different loading power and using a volatge gain of 4. Table VIII. The switching and the conduction losses are the total losses generated from the semiconductor devices (switch and diodes). In Table VIII comparison of the total efficiencies using voltage gains of 2 and 4 for the compared converters at 20 kW load power. In voltage gain 2, the magnetic losses which in the Y-source converter is sharing 34% of the total losses is the double percentage of the magnetic losses in the Z-source converter and 1.5 times the percentage in the boost converter. The capacitor losses in percentages are almost the same in the 3 converters. The switching and conduction losses are the lowest in the boost converter compared to the Z- source and Y-source converters. The switching and the conduction losses are varied based on the semiconductor devices ratings, as these devices are designed according to the required voltage gain, converter specifications, and to withstand the maximum ratings of each operated converter. In the voltage gain 4 case, the magnetic losses in the Y- source is sharing 42% of the total losses is more than double the percentage of the magnetic losses in the boost converter and 1.2 times the percentage in the Z-source converter. TABLE VII. Comparison of the total efficiencies using gain 2 and gain 4 for the converters at 20 kW load. Efficiency Boost Z-source Y-source Gain 2 98.3 % 96.7% 95.6% Gain 4 96.1 % 95% 93.7% V. CONCLUSIONS In this paper a comparison between the Y-source, Z-source and the conventional boost converter has been performed with respect to their thermal behaviour and efficiency. Different loading conditions between 1 kW and 20 kW are considered during the studies of the efficiency and junction temperature of the converters for two different voltages gain (2 and 4). The junction temperature variation in voltage gain of 4 is higher than the junction temperature variation in voltage gain of 2. Investigations on both the magnetic and electrical losses are also given. The magnetic losses which in the Y-source converter is sharing 34% and 42% of the total losses in voltage gain of 2 and 4 receptivity which is higher than in the boost and Z-source converters. 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